[U-Boot] [PATCH v5 0/7] Add VID support for QDS and RDB platforms

[Rajesh Bhagat]

> -----Original Message-----
> From: York Sun
> Sent: Monday, November 13, 2017 10:33 PM
> To: Rajesh Bhagat <rajesh.bhagat at nxp.com>; u-boot at lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>; Priyanka Jain
> <priyanka.jain at nxp.com>
> Subject: Re: [PATCH v5 0/7] Add VID support for QDS and RDB platforms
> 
> On 11/12/2017 09:29 PM, Rajesh Bhagat wrote:
> > Adds LTC3882 voltage regulator chip support in common VID driver.
> > And adds VID support for LS1088A QDS and RDB platforms.
> >
> > Rajesh Bhagat (7):
> >   armv8: lsch3: Add serdes and DDR voltage setup
> >   board: common:vid: Add LS1088A VID Supported voltage values
> >   board: common: vid: Add board specific vdd adjust API
> >   board: common: vid: Move IR chip specific code in flag
> >   Kconfig: Add LTC3882 voltage regulator config
> >   board: common: vid: Add support for LTC3882 voltage regulator chip
> >   ls1088a: Add VID support for QDS and RDB platforms
> >
> >  .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c    | 306
> +++++++++++++++++++++
> >  arch/arm/cpu/armv8/fsl-layerscape/soc.c            |  34 +--
> >  .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   2 +-
> >  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  43 ++-
> >  arch/arm/include/asm/arch-fsl-layerscape/soc.h     |   1 +
> >  board/freescale/common/Kconfig                     |  16 ++
> >  board/freescale/common/vid.c                       | 129 ++++++++-
> >  board/freescale/ls1088a/ls1088a.c                  | 120 ++++++++
> >  include/configs/ls1088aqds.h                       |  29 ++
> >  include/configs/ls1088ardb.h                       |  29 ++
> >  10 files changed, 688 insertions(+), 21 deletions(-)
> >
> 
> Rajesh,
> 
> Reading your patches, it seems you support different voltage for core, but only
> support 0.9v for serdes (patch #1) and DDR (patch #7). Is that right?
> 

Hello York, 

Basically, LS1088A requires special handling when core is setup to 0.9v 
which is described as below:

1. Configure the DDR controller to operate at 0.9 v by calling API ddr_enable_0v9_volt
2. Change Serdes SVDD Voltage regulator to 0.9v
3. Reset Serdes post voltage change, and continue with normal boot sequence. 

For all other voltage levels no special handling is required. 

- Rajesh 

> York