[U-Boot] [PATCH] armv8: fsl-layerscape: Add back L3 flushing for all exception levels

[York Sun]

On 09/10/2017 09:48 PM, York Sun wrote:
> CCN-504 HPF registers were believed to be accessible only from EL3.
> However, recent tests proved otherwise. Remove checking for exception
> level to re-enable L3 cache flushing for all levels.
> 
> Signed-off-by: York Sun <york.sun at nxp.com>
> ---

Applied to fsl-qoriq master.

York