[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Clément Péron]

Sorry these are my local commits you can find them here :

https://patchwork.ozlabs.org/patch/765992/
https://patchwork.ozlabs.org/patch/765996/
https://patchwork.ozlabs.org/patch/765997/
https://patchwork.ozlabs.org/patch/765998/

2017-09-22 14:12 GMT+02:00 Clément Péron <peron.clem at gmail.com>:
> Hi,
>
> I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07
> I cherry-picked commits from  Jason Rush :
> b90ce1c29023abe730d2b4174294bdc09acef3e0
> 836a0278476be94c95ff084f81c2302fc5c0265c
> b0eac7e0d1e4817388543b58d30b322d0bac49a8
>
> Also i forgot to put the
> "u-boot,dm-pre-reloc;" in my device tree in the qspi node.
>
> Now my QSPI is working fine except the sf unlock / lock
> I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c
>
> Hope this can help you
>
> Regards,
> Clement
>
> 2017-09-06 8:10 GMT+02:00 Hannes Schmelzer <hannes at schmelzer.or.at>:
>> Hi Jagan,
>>
>>
>> On 09/04/2017 08:22 AM, Hannes Schmelzer wrote:
>>>
>>> "U-Boot" <u-boot-bounces at lists.denx.de> schrieb am 01.09.2017 16:39:03:
>>> <hannes at schmelzer.or.at> wrote:
>>>>>
>>>>> Hi Eldor,
>>>>>
>>>>> just found your post in the mailinglist.
>>>>>
>>>>> https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
>>>>>
>>>>> Reason why i'm searched there is, that i've now excactly same problem
>>>
>>> as
>>>>>
>>>>> you.
>>>>
>>>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?
>>>
>>> Hi Jagan,
>>> please have a look into the weblink to the denx mailing list server.
>>> I have basically same trouble as eldor reported the days ago.
>>>
>>> A simple 'sf probe' ends up in a
>>> ### ERROR ### Please RESET the board ###
>>> Interesting detail is, that the information about the flash (type, size,
>>> ...) is printed out quite before the "hang".
>>>
>>> On wednesday i have the next time-slot to access the socfpga devkit board.
>>> So i could bring in more details if necessary.
>>
>> as told few days ago, i've now again access to my socfpga devkit board.
>> Here comes the console output:
>>
>> ---
>> U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35)
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to
>> start memory calibration
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION
>> PASSED
>> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration
>> complete
>> Trying to boot from MMC1
>> spl: partition error
>>
>>
>> U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200)
>>
>> CPU:   Altera SoCFPGA Platform
>> FPGA:  Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
>> BOOT:  SD/MMC Internal Transceiver (3.0V)
>>        Watchdog enabled
>> I2C:   ready
>> DRAM:  1 GiB
>> MMC:   dwmmc0 at ff704000: 0
>> *** Warning - bad CRC, using default environment
>>
>> In:    serial
>> Out:   serial
>> Err:   serial
>> Model: Altera SOCFPGA Cyclone V SoC Development Kit
>> Net:
>> Error: ethernet at ff702000 address not set.
>> No ethernet found.
>> Hit any key to stop autoboot:  0
>> => sf probe
>> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64
>> MiB
>> ### ERROR ### Please RESET the board ###
>> ----
>>
>> Afterwards the board does some reset (about 20sec. later).
>>
>>
>> cheers,
>> Hannes
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