[U-Boot] [[PATCH v2] 5/8] sunxi: musb: Enable OTG device clock for H3

[Jun Nie]

Enable OTG clock and deassert reset

Signed-off-by: Jun Nie <jun.nie at linaro.org>
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 1 +
 drivers/usb/musb-new/sunxi.c                  | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 2c82d0a..624d624 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -279,6 +279,7 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI2	26
 #define AHB_GATE_OFFSET_USB_EHCI1	25
 #define AHB_GATE_OFFSET_USB_EHCI0	24
+#define AHB_GATE_OFFSET_OTG_DEVICE	23
 #else
 #define AHB_GATE_OFFSET_USB_OHCI1	30
 #define AHB_GATE_OFFSET_USB_OHCI0	29
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 0005c1e..ce7365b 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -264,7 +264,10 @@ static int sunxi_musb_init(struct musb *musb)
 
 	setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_OTG_DEVICE));
+	setbits_le32(&ccm->ahb_reset0_cfg,
+		     BIT(AHB_GATE_OFFSET_USB0) |
+		     BIT(AHB_GATE_OFFSET_OTG_DEVICE));
 #endif
 	sunxi_usb_phy_init(0);
 
@@ -376,6 +379,7 @@ static int musb_usb_remove(struct udevice *dev)
 	sunxi_usb_phy_exit(0);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
 	clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE);
 #endif
 	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
 
-- 
1.9.1