[U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK

Thu Jan 11 01:16:57 UTC 2018

Hi Diego,

On Wed, Jan 10, 2018 at 11:08:54AM -0200, Diego Dorta wrote:
>Hi Peng,
>
>2018-01-10 3:20 GMT-02:00 Peng Fan <peng.fan at nxp.com>:
>> This patchset is to add i.MX8M and i.MX8MQ-EVK support
>>
>> V5:
>>  Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in
>>  the patchset.
>>
>> V4:
>>  Regenerate patchset based on Tom's master tree.
>>  In this patchset, https://patchwork.ozlabs.org/patch/855027/
>>  "arm: imx: Rework i.MX specific commands to be excluded from SPL" from
>>  Tom is included to avoid merge conflicts because the i.mx8m change
>>  also has some modification to bootaux and arch/arm/mach-imx/Makefile.
>>  Because CONFIG_GPT_TIMER change, I did a small modification to apply
>>  Tom's patch, no function change.
>>
>>  Include ATF link in README.
>>
>> V3:
>>  This patchset based on https://patchwork.ozlabs.org/patch/855027/
>>  "arm: imx: Rework i.MX specific commands to be excluded from SPL" from
>>  Tom to avoid this patchset fail apply after Tom's patch merged.
>>
>>  Previously "power: pmic/regulator allow dm be omited by SPL" broke other
>>  boards, in V3 patchset, only touch pfuze100 related options.
>>
>>  Sharing code about get mac from fuse between mx7/mx8m
>>  Sharing code about bootaux between mx6/7/mx8m
>>  Sharing code about cpu speed grade between mx7/mx8m
>>  Sharing code about get boot device between mx7/mx8m
>>  Sharding code about mmc env between mx7/mx8m
>>
>>  Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll configuration
>>
>>  Correct authorship of fix building warning on fec arm64, patch 27/31.
>>
>>  Switch to use structure for DDR Controller. For DDR PHY registers,
>>  there are about more than 10 thousands registers, I could not convert
>>  them with detailed register name, and the script is generated from IC team,
>>  So I use regs[0xxxxx] arrays here fo easily converting between IC team
>>  released script and uboot ddr phy cod.
>>
>>  Improve REAMME file to include where to download firmware and imx-mkimage
>>  and how to build
>>
>>  Add review tags on the V2 patchset.
>>
>>  Hope this patchset could catch up next release :)
>>
>> V2:
>>
>>  patch 02/23: convert to structure, drop is_boot_from_usb and
>>               disconnect_from_usb
>>  patch 04/23: conver to use structure for the clock driver, removed the
>>               CCM_xxx macros. Add static for local functons.
>>               Add init_usdhc_clk, init_uart_clk and etc to not enable
>>               them all at default.
>>  patch 05/23: Add more commit msg for the sip part.
>>  patch 08/23: Merge the spl boot device with i.MX7
>>  patch 12/23: Typo fix and return error fix from Heiko for the SoC related part
>>  patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be
>>               accepted at current stage, to make others still be could be
>>               compiled.
>>
>> The patchset depends on
>> https://patchwork.ozlabs.org/patch/841934/
>> https://patchwork.ozlabs.org/patch/841958/
>> to be tested on real hardware.
>>
>> V1:
>>
>> patch: "power: pmic.h: include dm/ofnode.h" and
>> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed
>> in mailist to not merged. If no issue, you may pick it up.
>>
>> The board support is a large patch because of the ddr related code.
>> If it is not good, please first review/pick-up other patches if they
>> are ok.
>>
>>
>>
>> Peng Fan (29):
>>   imx: add i.MX8M into Kconfig
>>   imx: mx8m: add register definition header file
>>   imx: mx8m: add pin header file
>>   imx: mx8m: add clock driver
>>   imx: add sip function
>>   imx: boot_mode: add USB_BOOT entry
>>   imx: cpu: update cpu file to support i.MX8M
>>   imx: spl: implement spl_boot_device for i.MX8M
>>   imx: add i.MX8MQ SoC Revision and is_mx8m helper
>>   imx: add pad settings bit definition for i.MX8M
>>   imx: cpu: move speed/temp to common cpu
>>   imx: cpu: add cpu speed/grade for i.MX8M
>>   imx: refactor imx_get_mac_from_fuse
>>   imx: cleanup bootaux
>>   imx: bootaux: support i.MX8M
>>   imx: mx7: move get_boot_device to cpu.c
>>   imx: cpu: support get_boot_device for i.MX8M
>>   imx: mx7: move mmc env code to mmc_env.c
>>   imx: mx8m: add soc related settings and files
>>   imx: makefile: compile files for i.MX8M
>>   misc: ocotp: add i.MX8M support
>>   mmc: fsl_esdhc: support i.MX8M
>>   imx: lcdif: include i.MX8M
>>   gpio: mxc: add i.MX8M support
>>   net: fec: do not access reserved register for i.MX8M
>>   imx: imx8mq: add dtsi file
>>   power: pmic/regulator allow dm be omitted by SPL
>>   imx: mx8m: add ddr controller memory map
>>   imx: add i.MX8MQ EVK support
>>
>> Tom Rini (1):
>>   arm: imx: Rework i.MX specific commands to be excluded from SPL
>
>Thanks for your V5 patches, this time I had no problem on compiling it.
>
>But, even following your README step by step, the U-Boot hangs
>completely on this point:
>
>U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45)
>PMIC:  PFUZE100 ID=0x10
>PMU message timeout

Seems needs larger time wait.
Could you try
static inline void poll_pmu_message_ready(void)
{
        int ret;
        u32 val;

        /*
         * When BIT0 set to 0, the PMU has a message for the user
         * 10ms seems not enough for poll message, so use 1s here.
         */
          ret = readl_poll_timeout(&regs->reg[0xd0004], val,
                            !(val & BIT(0)), 1000000);  --> Change 1000000 to 0?
           if (ret)
              puts("PMU message timeout\n");
}

in board/freescale/mx8mq_evk/ddr/ddrphy_train.c
Not sure you are using latest B0 chip or not.

I'll wait for comments before sending new version patchset.

Thanks,
Peng.

>Normal Boot
>Trying to boot from MMC2
>
>Do you know how to solve it? If so, please add this information on the
>README file.
>
>Thanks,
>Diego
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