[U-Boot] [PATCH 2/3] xilinx: zynqmp: Add new target with only nand enabled
Michal Simek
michal.simek at xilinx.com
Tue Jan 16 10:43:19 UTC 2018
On 5.1.2018 11:46, Siva Durga Prasad Paladugu wrote:
> This patch adds new target which is called as mini configuration
> with only nand functionality and other required basic features enabled.
> This will be used to run in system with small footprint and needs
> nand support.
>
> Signed-off-by: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/zynqmp-mini-nand.dts | 109 ++++++++++++++++++++++++++++++
> configs/xilinx_zynqmp_mini_nand_defconfig | 44 ++++++++++++
> include/configs/xilinx_zynqmp_mini_nand.h | 24 +++++++
> 4 files changed, 178 insertions(+)
> create mode 100644 arch/arm/dts/zynqmp-mini-nand.dts
> create mode 100644 configs/xilinx_zynqmp_mini_nand_defconfig
> create mode 100644 include/configs/xilinx_zynqmp_mini_nand.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 5ef942e..f702fa1 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
> zynq-zybo.dtb
> dtb-$(CONFIG_ARCH_ZYNQMP) += \
> zynqmp-ep108.dtb \
> + zynqmp-mini-nand.dtb \
> zynqmp-mini-qspi-single.dtb \
> zynqmp-zcu102-revA.dtb \
> zynqmp-zcu102-revB.dtb \
> diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts
> new file mode 100644
> index 0000000..16e5f55
> --- /dev/null
> +++ b/arch/arm/dts/zynqmp-mini-nand.dts
> @@ -0,0 +1,109 @@
> +/*
> + * dts file for Xilinx ZynqMP Mini Configuration
> + *
> + * (C) Copyright 2018, Xilinx, Inc.
> + *
> + * Siva Durga Prasad <siva.durga.paladugu at xilinx.com>
> + * Michal Simek <michal.simek at xilinx.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + model = "ZynqMP MINI NAND";
> + compatible = "xlnx,zynqmp";
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + aliases {
> + serial0 = &dcc;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory at 0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x40000000>;
> + };
> +
> + dcc: dcc {
> + compatible = "arm,dcc";
> + status = "disabled";
> + u-boot,dm-pre-reloc;
> + };
> +
> + amba: amba {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges;
> +
> + nand0: nand at ff100000 {
> + compatible = "arasan,nfc-v3p10";
> + status = "okay";
> + reg = <0x0 0xff100000 0x1000>;
> + clock-names = "clk_sys", "clk_flash";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + arasan,has-mdma;
> + num-cs = <2>;
> +
> + partition at 0 { /* for testing purpose */
> + label = "nand-fsbl-uboot";
> + reg = <0x0 0x0 0x400000>;
> + };
> + partition at 1 { /* for testing purpose */
> + label = "nand-linux";
> + reg = <0x0 0x400000 0x1400000>;
> + };
> + partition at 2 { /* for testing purpose */
> + label = "nand-device-tree";
> + reg = <0x0 0x1800000 0x400000>;
> + };
> + partition at 3 { /* for testing purpose */
> + label = "nand-rootfs";
> + reg = <0x0 0x1C00000 0x1400000>;
> + };
> + partition at 4 { /* for testing purpose */
> + label = "nand-bitstream";
> + reg = <0x0 0x3000000 0x400000>;
> + };
> + partition at 5 { /* for testing purpose */
> + label = "nand-misc";
> + reg = <0x0 0x3400000 0xFCC00000>;
> + };
> + partition at 6 { /* for testing purpose */
> + label = "nand1-fsbl-uboot";
> + reg = <0x1 0x0 0x400000>;
> + };
> + partition at 7 { /* for testing purpose */
> + label = "nand1-linux";
> + reg = <0x1 0x400000 0x1400000>;
> + };
> + partition at 8 { /* for testing purpose */
> + label = "nand1-device-tree";
> + reg = <0x1 0x1800000 0x400000>;
> + };
> + partition at 9 { /* for testing purpose */
> + label = "nand1-rootfs";
> + reg = <0x1 0x1C00000 0x1400000>;
> + };
> + partition at 10 { /* for testing purpose */
> + label = "nand1-bitstream";
> + reg = <0x1 0x3000000 0x400000>;
> + };
> + partition at 11 { /* for testing purpose */
> + label = "nand1-misc";
> + reg = <0x1 0x3400000 0xFCC00000>;
> + };
> + };
> + };
> +};
> +
> +&dcc {
> + status = "okay";
> +};
> diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig
> new file mode 100644
> index 0000000..bc455bc
> --- /dev/null
> +++ b/configs/xilinx_zynqmp_mini_nand_defconfig
> @@ -0,0 +1,44 @@
> +CONFIG_ARM=y
> +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand"
> +CONFIG_ARCH_ZYNQMP=y
> +CONFIG_SYS_TEXT_BASE=0x10000
> +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
> +CONFIG_FIT=y
> +CONFIG_BOOTDELAY=-1
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_SYS_PROMPT="ZynqMP> "
> +# CONFIG_CMD_BDI is not set
> +# CONFIG_CMD_CONSOLE is not set
> +# CONFIG_CMD_BOOTD is not set
> +# CONFIG_CMD_BOOTM is not set
> +# CONFIG_CMD_BOOTI is not set
> +# CONFIG_CMD_GO is not set
> +# CONFIG_CMD_RUN is not set
> +# CONFIG_CMD_IMI is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_EXPORTENV is not set
> +# CONFIG_CMD_IMPORTENV is not set
> +# CONFIG_CMD_EDITENV is not set
> +# CONFIG_CMD_SAVEENV is not set
> +# CONFIG_CMD_ENV_EXISTS is not set
> +# CONFIG_CMD_CRC32 is not set
> +# CONFIG_CMD_DM is not set
> +# CONFIG_CMD_FLASH is not set
> +# CONFIG_CMD_FPGA is not set
> +# CONFIG_CMD_LOADB is not set
> +# CONFIG_CMD_LOADS is not set
> +# CONFIG_CMD_ECHO is not set
> +# CONFIG_CMD_ITEST is not set
> +# CONFIG_CMD_SOURCE is not set
> +# CONFIG_CMD_SETEXPR is not set
> +# CONFIG_CMD_NET is not set
> +# CONFIG_CMD_NFS is not set
> +# CONFIG_PARTITIONS is not set
> +# CONFIG_DOS_PARTITION is not set
> +CONFIG_OF_EMBED=y
> +# CONFIG_DM_WARN is not set
> +# CONFIG_DM_DEVICE_REMOVE is not set
> +# CONFIG_MMC is not set
> +CONFIG_NAND=y
> +CONFIG_NAND_ARASAN=y
> +# CONFIG_EFI_LOADER is not set
> diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h
> new file mode 100644
> index 0000000..8c13f47
> --- /dev/null
> +++ b/include/configs/xilinx_zynqmp_mini_nand.h
> @@ -0,0 +1,24 @@
> +/*
> + * Configuration for Xilinx ZynqMP Nand Flash utility
> + *
> + * (C) Copyright 2018 Xilinx, Inc.
> + * Michal Simek <michal.simek at xilinx.com>
> + * Siva Durga Prasad Paladugu <sivadur at xilinx.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_ZYNQMP_MINI_NAND_H
> +#define __CONFIG_ZYNQMP_MINI_NAND_H
> +
> +#include <configs/xilinx_zynqmp_mini.h>
> +
> +#define CONFIG_SYS_ICACHE_OFF
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define CONFIG_SYS_SDRAM_SIZE 0x1000000
> +#define CONFIG_SYS_SDRAM_BASE 0x0
> +#define CONFIG_ENV_SIZE 0x10000
> +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000)
> +#define CONFIG_SYS_MALLOC_LEN 0x800000
> +
> +#endif /* __CONFIG_ZYNQMP_MINI_NAND_H */
>
Applied.
M
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