[U-Boot] [PATCH v2 0/4] ddr: marvell: update DDR driver

[Chris Packham]

I have a custom board that sees correctable ECC errors (when running
memtester[1] from Linux). When I used Marvell's bootloader I didn't
see the errors.

I've also had a tame hardware engineer (if there is such a thing)
looking at the timing waveforms comparing the stock u-boot behaviour
against Marvell's bootloader.

The changes for this series have been derived by comparing scope
captures and register output between the same system running stock
u-boot and Marvell's USP.

Changes in v2:
- Update tODT_OFF_WR as well
- Added patches 2-4

Chris Packham (4):
  ddr: marvell: only assert M_ODT[0] on write for a single CS
  ddr: marvell: use correct TREFI value
  ddr: marvell: update additional ODT setting
  ddr: marvell: update ddr controller init and freq

 drivers/ddr/marvell/a38x/ddr3_init.h             |  3 +-
 drivers/ddr/marvell/a38x/ddr3_topology_def.h     |  3 +-
 drivers/ddr/marvell/a38x/ddr3_training.c         | 50 +++++++++++++++---------
 drivers/ddr/marvell/a38x/ddr3_training_db.c      | 19 +++++----
 drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c | 22 +++++++----
 drivers/ddr/marvell/a38x/ddr3_training_static.c  |  3 +-
 6 files changed, 62 insertions(+), 38 deletions(-)

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2.15.1