[U-Boot] [PATCH 3/3] clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()

[Patrice CHOTARD]

Hi Vikas

On 01/17/2018 08:55 PM, Vikas Manocha wrote:
> Hi Patrice,
> 
> On 01/17/2018 12:46 AM, patrice.chotard at st.com wrote:
>> From: Patrice Chotard <patrice.chotard at st.com>
>>
>> Move SYSCFG clock setup into configure_clocks() instead of calling
>> clock_setup() from drivers.
> 
> It is in board configuration.

Yes, my comment is badly formulated.

The idea is to remove clock_setup() from clock driver.

> 
>> Move the RMII setup from board_early_init_f() to board_init()
>> to insure that RMII bit is set only when clock driver is initialized.
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
>> ---
>>   arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  1 -
>>   board/st/stm32f746-disco/stm32f746-disco.c       | 19 ++++++-------------
>>   drivers/clk/clk_stm32f.c                         | 10 ++++------
>>   3 files changed, 10 insertions(+), 20 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
>> index 13f9c9b..7b8f66a 100644
>> --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
>> +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
>> @@ -21,7 +21,6 @@ enum periph_id {
>>   };
>>   
>>   enum periph_clock {
>> -	SYSCFG_CLOCK_CFG,
>>   	TIMER2_CLOCK_CFG,
>>   };
>>   
>> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
>> index 58a5ef0..8da7028 100644
>> --- a/board/st/stm32f746-disco/stm32f746-disco.c
>> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
>> @@ -69,23 +69,10 @@ int dram_init_banksize(void)
>>   	return 0;
>>   }
>>   
>> -#ifdef CONFIG_ETH_DESIGNWARE
>> -static int stmmac_setup(void)
>> -{
>> -	clock_setup(SYSCFG_CLOCK_CFG);
>> -	/* Set >RMII mode */
>> -	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
>> -
>> -	return 0;
>> -}
>> -
>>   int board_early_init_f(void)
>>   {
>> -	stmmac_setup();
>> -
>>   	return 0;
>>   }
>> -#endif
>>   
>>   #ifdef CONFIG_SPL_BUILD
>>   #ifdef CONFIG_SPL_OS_BOOT
>> @@ -162,5 +149,11 @@ int board_late_init(void)
>>   int board_init(void)
>>   {
>>   	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
>> +
>> +#ifdef CONFIG_ETH_DESIGNWARE
>> +	/* Set >RMII mode */
>> +	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
>> +#endif
>> +
>>   	return 0;
>>   }
>> diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
>> index d0c7a90..1ae5b70 100644
>> --- a/drivers/clk/clk_stm32f.c
>> +++ b/drivers/clk/clk_stm32f.c
>> @@ -67,8 +67,6 @@
>>   #define RCC_DCKCFGRX_SDMMC1SEL		BIT(28)
>>   #define RCC_DCKCFGR2_SDMMC2SEL		BIT(29)
>>   
>> -#define RCC_APB2ENR_SAI1EN		BIT(22)
>> -
>>   /*
>>    * RCC AHB1ENR specific definitions
>>    */
>> @@ -86,9 +84,9 @@
>>    * RCC APB2ENR specific definitions
>>    */
>>   #define RCC_APB2ENR_SYSCFGEN		BIT(14)
>> +#define RCC_APB2ENR_SAI1EN		BIT(22)
>>   
>>   enum periph_clock {
>> -	SYSCFG_CLOCK_CFG,
>>   	TIMER2_CLOCK_CFG,
>>   };
>>   
>> @@ -227,6 +225,9 @@ static int configure_clocks(struct udevice *dev)
>>   	/* gate the SAI clock, needed for MMC 1&2 clocks */
>>   	setbits_le32(&regs->apb2enr, RCC_APB2ENR_SAI1EN);
>>   
>> +	/* gate the SYSCFG clock, needed to set RMII ethernet interface */
> 
> RMII interface only required for f746 disco board.
> 
>> +	setbits_le32(&regs->apb2enr, RCC_APB2ENR_SYSCFGEN);
> 
> RMII & Syscfg is board specific requirement, here it will configure it for all stm32f devices.

You are right, i will update this. As it is currently only needed for 
ethernet, i will add the CONFIG_ETH_DESIGNWARE flag around.

For information, i will add new stm32f429-evaluation board (already 
supported in kernel) which provide ethernet connection.

Thanks for reviewing

Patrice

> 
> Cheers,
> Vikas
> 
>> +
>>   	return 0;
>>   }
>>   
>> @@ -352,9 +353,6 @@ static int stm32_clk_enable(struct clk *clk)
>>   void clock_setup(int peripheral)
>>   {
>>   	switch (peripheral) {
>> -	case SYSCFG_CLOCK_CFG:
>> -		setbits_le32(&STM32_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN);
>> -		break;
>>   	case TIMER2_CLOCK_CFG:
>>   		setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
>>   		break;
>>