[U-Boot] [PATCH v3 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses

[Vignesh R]

This series reverts use of bounce_buf.c for non-DMA related alignment
restriction and replaces it with local bounce buffer to handle problems
with non 32 bit aligned writes on TI platforms.
Based on top of Jason's series:
[PATCH v6 0/4] spi: cadence_spi: Adopt Linux DT bindings

Tested on K2G EVM.

v3:
Rebased on top of latest u-boot-spi/master changes.

Goldschmidt Simon (1):
  Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction
    when possible"

Vignesh R (2):
  Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction
    when possible"
  spi: cadence_qspi_apb: Make flash writes 32 bit aligned

 drivers/spi/cadence_qspi_apb.c   | 53 ++++++++++++++++++++--------------------
 include/configs/k2g_evm.h        |  1 -
 include/configs/socfpga_common.h |  1 -
 include/configs/stv0991.h        |  1 -
 4 files changed, 26 insertions(+), 30 deletions(-)

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2.16.0