[U-Boot] [PATCH 1/1] arm: socfpga: fix qspi flash compatible (add "spi-flash")

[Marek Vasut]

On 01/29/2018 07:36 AM, Simon Goldschmidt wrote:
> This patch adds "spi-flash" to the compatible list of the qspi flash
> chip for all socfpga boards. This is required to make qspi work on
> these boards on top of the recent fixes. Without the "spi-flash"
> compatible string for the flash chip, the speed cannot be read and a
> speed of 0Hz is used (which results in a divide-by-zero on these
> boards).
> 
> Signed-off-by: Simon Goldschmidt <sgoldschmidt at de.pepperl-fuchs.com>

What's the status of the recent fixes ? Are they in already ?

Applied anyway, thanks.

> ---
>  arch/arm/dts/socfpga_arria5_socdk.dts      | 2 +-
>  arch/arm/dts/socfpga_cyclone5_is1.dts      | 2 +-
>  arch/arm/dts/socfpga_cyclone5_socdk.dts    | 2 +-
>  arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
> index 1e91a65af6..4e4b619f4f 100644
> --- a/arch/arm/dts/socfpga_arria5_socdk.dts
> +++ b/arch/arm/dts/socfpga_arria5_socdk.dts
> @@ -88,7 +88,7 @@
>  		u-boot,dm-pre-reloc;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		compatible = "n25q00";
> +		compatible = "n25q00", "spi-flash";
>  		reg = <0>;      /* chip select */
>  		spi-max-frequency = <50000000>;
>  		m25p,fast-read;
> diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
> index 2e2b71fefb..ea323a16ca 100644
> --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> @@ -87,7 +87,7 @@
>  		u-boot,dm-pre-reloc;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		compatible = "n25q00";
> +		compatible = "n25q00", "spi-flash";
>  		reg = <0>;      /* chip select */
>  		spi-max-frequency = <100000000>;
>  		m25p,fast-read;
> diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> index 95a8e653d7..3af51134bb 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> @@ -98,7 +98,7 @@
>  		u-boot,dm-pre-reloc;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		compatible = "n25q00";
> +		compatible = "n25q00", "spi-flash";
>  		reg = <0>;      /* chip select */
>  		spi-max-frequency = <100000000>;
>  		m25p,fast-read;
> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> index e3ae8a8207..e612eeed4f 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> @@ -68,7 +68,7 @@
>  	flash0: n25q00 at 0 {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		compatible = "n25q00";
> +		compatible = "n25q00", "spi-flash";
>  		reg = <0>;      /* chip select */
>  		spi-max-frequency = <50000000>;
>  		m25p,fast-read;
> 


-- 
Best regards,
Marek Vasut