[U-Boot] [PATCH v7 06/35] musb: sunxi: Add OTG device clkgate and reset for H3/H5
Maxime Ripard
maxime.ripard at bootlin.com
Mon May 7 14:52:46 UTC 2018
On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
> On 05/07/2018 09:33 AM, Jagan Teki wrote:
> > Add OTG device clkgate and reset for H3/H5 through driver_data.
> >
> > Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
>
> Why don't you implement a clock driver for this SoC instead ?
Aren't you asking a bit too much?
Since the first post of these patches, you've asked to rework in a
significant manner the driver already, including doing a new PHY
driver to use the device model, and making other substantial changes
to it.
Jagan complied to all your requests so far, but this one is going to
create yet another ton of patches on top of an (already) 35 patches
series. And this request comes out of nowhere at the 7th version.
Creating a new clock driver will take a lot of effort, and this really
surprise me given that we've had strictly no feedback from you on this
considering all the previous SoCs bringups we've done so far.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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