[U-Boot] [PATCH] x86: tsc: add support for reading CPU freq from cpuid

Bin Meng bmeng.cn at gmail.com
Fri May 25 03:57:55 UTC 2018


On Wed, May 23, 2018 at 5:48 PM, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Mon, May 14, 2018 at 5:32 PM, Christian Gmeiner
> <christian.gmeiner at gmail.com> wrote:
>> Starting with cpuid level 0x16 (Skylake-based processors)
>> it is possible to get CPU base freq via cpuid.
>>
>> This fixes booting on a skylake based system.
>>
>> Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
>> ---
>>  drivers/timer/tsc_timer.c | 31 +++++++++++++++++++++++++------
>>  1 file changed, 25 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
>> index c7fefd2031..96a3e55513 100644
>> --- a/drivers/timer/tsc_timer.c
>> +++ b/drivers/timer/tsc_timer.c
>> @@ -21,6 +21,17 @@
>>
>>  DECLARE_GLOBAL_DATA_PTR;
>>
>> +static unsigned long cpu_mhz_from_cpuid(void)
>> +{
>> +       if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
>> +               return 0;
>> +
>> +       if (cpuid_eax(0) < 0x16)
>> +               return 0;
>> +
>> +       return cpuid_eax(0x16);
>> +}
>> +
>>  /*
>>   * According to Intel 64 and IA-32 System Programming Guide,
>>   * if MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be
>> @@ -343,14 +354,22 @@ static void tsc_timer_ensure_setup(void)
>>         if (!gd->arch.clock_rate) {
>>                 unsigned long fast_calibrate;
>>
>> +               fast_calibrate = cpu_mhz_from_cpuid();
>> +               if (fast_calibrate)
>> +                       goto done;
>> +
>>                 fast_calibrate = cpu_mhz_from_msr();
>> -               if (!fast_calibrate) {
>> -                       fast_calibrate = quick_pit_calibrate();
>> -                       if (!fast_calibrate)
>> -                               panic("TSC frequency is ZERO");
>> -               }
>> +               if (fast_calibrate)
>> +                       goto done;
>> +
>> +               fast_calibrate = quick_pit_calibrate();
>> +               if (fast_calibrate)
>> +                       goto done;
>> +
>> +               panic("TSC frequency is ZERO");
>>
>> -               gd->arch.clock_rate = fast_calibrate * 1000000;
>> +               done:
>
> nits: this indention is wrong, and will cause checkpatch warnings.
>
>> +                       gd->arch.clock_rate = fast_calibrate * 1000000;
>>         }
>>  }
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
>
> I can fix the nits when applying.

Fixed the nits and
applied to u-boot-x86, thanks!


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