[U-Boot] [PATCH] mvebu: a38x: Force receiver detected on PCIe lanes

[Mario Six]

Hi Stefan,

On Mon, May 28, 2018 at 4:49 PM, Stefan Roese <sr at denx.de> wrote:
> On 28.05.2018 15:15, Mario Six wrote:
>>
>> Hi Stefan,
>>
>> On Mon, May 28, 2018 at 2:52 PM, Stefan Roese <sr at denx.de> wrote:
>>>
>>> (Added Mario and Chris)
>>>
>>>
>>> On 27.05.2018 17:34, Baruch Siach wrote:
>>>>
>>>>
>>>> From: Rabeeh Khoury <rabeeh at solid-run.com>
>>>>
>>>> Some QCA988x based modules presence is not detected by the SERDES lanes,
>>>> so force this detection which will trigger the LTSSM state machine to
>>>> negotiate link.
>>>>
>>>> An example of such a card is WLE900VX.
>>>>
>>>> Signed-off-by: Rabeeh Khoury <rabeeh at solid-run.com>
>>>> Signed-off-by: Baruch Siach <baruch at tkos.co.il>
>>>> ---
>>>>    arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c | 2 ++
>>>>    arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h         | 1 +
>>>>    2 files changed, 3 insertions(+)
>>>>
>>>> diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
>>>> b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
>>>> index 13553cf96008..33e70569bc48 100644
>>>> --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
>>>> +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
>>>> @@ -597,6 +597,8 @@ struct op_params
>>>> pex_electrical_config_serdes_rev2_params[] = {
>>>>          {LANE_CFG4_REG, 0x800, 0x8, {0x8}, 0, 0},
>>>>          /* tximpcal_th and rximpcal_th */
>>>>          {VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0},
>>>> +       /* Force receiver detected */
>>>> +       {LANE_CFG0_REG, 0x800, 0x8000, {0x8000}, 0, 0},
>>>>    };
>>>>      /* PEX - configuration seq for REF_CLOCK_25MHz */
>>>> diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
>>>> b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
>>>> index 953445b7d7ae..50b235826659 100644
>>>> --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
>>>> +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
>>>> @@ -71,6 +71,7 @@
>>>>    #define RX_REG3                               0xa0188
>>>>    #define PCIE_REG1                     0xa0288
>>>>    #define PCIE_REG3                     0xa0290
>>>> +#define LANE_CFG0_REG                  0xa0600
>>>>    #define LANE_CFG1_REG                 0xa0604
>>>>    #define LANE_CFG4_REG                 0xa0620
>>>>    #define LANE_CFG5_REG                 0xa0624
>>>>
>>>
>>> I understand that this might fix an issue on a specific board (ClearFog
>>> in this case, correct?). But are you sure that its safe to force this
>>> link detection for all A38x boards?
>>>
>>
>> I just did a quick test on a controlcenterdc board, and it seems to work.
>> I'll
>> try to do some more extensive tests this week (unless somebody has another
>> objection, of course).
>
>
> Thanks Mario, please send a "Tested-by" tag to this thread, so that
> we can collect this into the patch summary.
>

Sure. All general tests look fine, so:

Tested-by: Mario Six <mario.six at gdsys.cc>

> Thanks,
> Stefan
>

Best regards,
Mario