[U-Boot] [PATCH] configs: fsl: move DDR specific defines to Kconfig

Rajesh Bhagat rajesh.bhagat at nxp.com
Fri Feb 1 05:22:01 UTC 2019 

Moves below DDR specific defines to Kconfig:

CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH

Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
---
 arch/arm/Kconfig                    | 14 ++++++++++++++
 arch/powerpc/cpu/mpc85xx/Kconfig    | 13 +++++++++++++
 arch/powerpc/cpu/mpc86xx/Kconfig    |  1 +
 drivers/ddr/fsl/Kconfig             | 12 ++++++++++++
 include/configs/B4860QDS.h          |  3 ---
 include/configs/BSC9132QDS.h        |  1 -
 include/configs/MPC8536DS.h         |  1 -
 include/configs/MPC8540ADS.h        |  1 -
 include/configs/MPC8541CDS.h        |  1 -
 include/configs/MPC8544DS.h         |  1 -
 include/configs/MPC8548CDS.h        |  1 -
 include/configs/MPC8555CDS.h        |  1 -
 include/configs/MPC8560ADS.h        |  1 -
 include/configs/MPC8568MDS.h        |  1 -
 include/configs/MPC8569MDS.h        |  1 -
 include/configs/MPC8572DS.h         |  1 -
 include/configs/MPC8610HPCD.h       |  1 -
 include/configs/MPC8641HPCN.h       |  1 -
 include/configs/P1023RDB.h          |  1 -
 include/configs/T102xRDB.h          |  1 -
 include/configs/T1040QDS.h          |  1 -
 include/configs/T208xQDS.h          |  2 --
 include/configs/T208xRDB.h          |  1 -
 include/configs/T4240RDB.h          |  1 -
 include/configs/UCP1020.h           |  1 -
 include/configs/km/kmp204x-common.h |  1 -
 include/configs/ls1021aqds.h        |  1 -
 include/configs/ls1043aqds.h        |  4 ----
 include/configs/ls1043ardb.h        |  2 --
 include/configs/ls1046aqds.h        |  4 ----
 include/configs/ls1046ardb.h        |  4 ----
 include/configs/ls1088a_common.h    |  4 ----
 include/configs/ls2080a_common.h    |  3 ---
 include/configs/ls2080a_emu.h       |  2 --
 include/configs/ls2080aqds.h        |  3 ---
 include/configs/ls2080ardb.h        |  2 --
 include/configs/p1_p2_rdb_pc.h      |  1 -
 include/configs/sbc8548.h           |  1 -
 include/configs/socrates.h          |  1 -
 include/configs/t4qds.h             |  1 -
 include/configs/xpedite520x.h       |  1 -
 include/configs/xpedite537x.h       |  1 -
 scripts/config_whitelist.txt        |  4 ----
 43 files changed, 40 insertions(+), 64 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cefa8f40d0..829b34787a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -998,6 +998,7 @@ config TARGET_LS2080A_EMU
 	select ARCH_MISC_INIT
 	select ARM64
 	select ARMV8_MULTIENTRY
+	select FSL_DDR_SYNC_REFRESH
 	help
 	  Support for Freescale LS2080A_EMU platform
 	  The LS2080A Development System (EMULATOR) is a pre silicon
@@ -1024,6 +1025,7 @@ config TARGET_LS1088AQDS
 	select ARMV8_MULTIENTRY
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select FSL_DDR_INTERACTIVE if !SD_BOOT
 	help
 	  Support for NXP LS1088AQDS platform
 	  The LS1088A Development System (QDS) is a high-performance
@@ -1040,6 +1042,8 @@ config TARGET_LS2080AQDS
 	select SUPPORT_SPL
 	imply SCSI
 	imply SCSI_AHCI
+	select FSL_DDR_BIST
+	select FSL_DDR_INTERACTIVE if !SPL
 	help
 	  Support for Freescale LS2080AQDS platform
 	  The LS2080A Development System (QDS) is a high-performance
@@ -1054,6 +1058,8 @@ config TARGET_LS2080ARDB
 	select ARMV8_MULTIENTRY
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select FSL_DDR_BIST
+	select FSL_DDR_INTERACTIVE if !SPL
 	imply SCSI
 	imply SCSI_AHCI
 	help
@@ -1172,6 +1178,7 @@ config TARGET_LS1088ARDB
 	select ARMV8_MULTIENTRY
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select FSL_DDR_INTERACTIVE if !SD_BOOT
 	help
 	  Support for NXP LS1088ARDB platform.
 	  The LS1088A Reference design board (RDB) is a high-performance
@@ -1190,6 +1197,7 @@ config TARGET_LS1021AQDS
 	select LS1_DEEP_SLEEP
 	select SUPPORT_SPL
 	select SYS_FSL_DDR
+	select FSL_DDR_INTERACTIVE
 	imply SCSI
 
 config TARGET_LS1021ATWR
@@ -1229,6 +1237,7 @@ config TARGET_LS1043AQDS
 	select BOARD_EARLY_INIT_F
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select FSL_DDR_INTERACTIVE if !SPL
 	imply SCSI
 	help
 	  Support for Freescale LS1043AQDS platform.
@@ -1241,6 +1250,8 @@ config TARGET_LS1043ARDB
 	select BOARD_EARLY_INIT_F
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select FSL_DDR_BIST if !SPL
+	select FSL_DDR_INTERACTIVE  if !SPL
 	imply SCSI
 	help
 	  Support for Freescale LS1043ARDB platform.
@@ -1254,6 +1265,7 @@ config TARGET_LS1046AQDS
 	select BOARD_LATE_INIT
 	select DM_SPI_FLASH if DM_SPI
 	select SUPPORT_SPL
+	select FSL_DDR_INTERACTIVE if !SPL
 	imply SCSI
 	help
 	  Support for Freescale LS1046AQDS platform.
@@ -1271,6 +1283,8 @@ config TARGET_LS1046ARDB
 	select DM_SPI_FLASH if DM_SPI
 	select POWER_MC34VR500
 	select SUPPORT_SPL
+	select FSL_DDR_BIST
+	select FSL_DDR_INTERACTIVE if !SPL
 	imply SCSI
 	help
 	  Support for Freescale LS1046ARDB platform.
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 309ca29460..0057f195b3 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -37,6 +37,7 @@ config TARGET_B4860QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_INTERACTIVE if !SPL_BUILD
 	imply PANIC_HANG
 
 config TARGET_BSC9131RDB
@@ -51,6 +52,7 @@ config TARGET_BSC9132QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select BOARD_EARLY_INIT_F
+	select FSL_DDR_INTERACTIVE
 
 config TARGET_C29XPCIE
 	bool "Support C29XPCIE"
@@ -165,6 +167,7 @@ config TARGET_P1022DS
 config TARGET_P1023RDB
 	bool "Support P1023RDB"
 	select ARCH_P1023
+	select FSL_DDR_INTERACTIVE
 	imply CMD_EEPROM
 	imply PANIC_HANG
 
@@ -273,6 +276,7 @@ config TARGET_T1023RDB
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_INTERACTIVE
 	imply CMD_EEPROM
 	imply PANIC_HANG
 
@@ -282,6 +286,7 @@ config TARGET_T1024RDB
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_INTERACTIVE
 	imply CMD_EEPROM
 	imply PANIC_HANG
 
@@ -290,6 +295,7 @@ config TARGET_T1040QDS
 	select ARCH_T1040
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select PHYS_64BIT
+	select FSL_DDR_INTERACTIVE
 	imply CMD_EEPROM
 	imply CMD_SATA
 	imply PANIC_HANG
@@ -344,6 +350,8 @@ config TARGET_T2080QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+	select FSL_DDR_INTERACTIVE
 	imply CMD_SATA
 
 config TARGET_T2080RDB
@@ -360,6 +368,8 @@ config TARGET_T2081QDS
 	select ARCH_T2081
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+	select FSL_DDR_INTERACTIVE
 
 config TARGET_T4160QDS
 	bool "Support T4160QDS"
@@ -383,6 +393,7 @@ config TARGET_T4240QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 	imply CMD_SATA
 	imply PANIC_HANG
 
@@ -391,6 +402,7 @@ config TARGET_T4240RDB
 	select ARCH_T4240
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 	imply CMD_SATA
 	imply PANIC_HANG
 
@@ -402,6 +414,7 @@ config TARGET_KMP204X
 	bool "Support kmp204x"
 	select ARCH_P2041
 	select PHYS_64BIT
+	select FSL_DDR_INTERACTIVE
 	imply CMD_CRAMFS
 	imply FS_CRAMFS
 
diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 2cc180da38..0f253051f2 100644
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -21,6 +21,7 @@ config TARGET_MPC8610HPCD
 config TARGET_MPC8641HPCN
 	bool "Support MPC8641HPCN"
 	select ARCH_MPC8641
+	select FSL_DDR_INTERACTIVE
 	imply SCSI
 
 config TARGET_XPEDITE517X
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index c5bd8a8876..1b73df82de 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -20,6 +20,18 @@ config SYS_FSL_DDR_LE
 	help
 		Access DDR registers in little-endian
 
+config FSL_DDR_BIST
+	bool
+
+config FSL_DDR_INTERACTIVE
+	bool
+
+config FSL_DDR_SYNC_REFRESH
+	bool
+
+config FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+	bool
+
 menu "Freescale DDR controllers"
 	depends on SYS_FSL_DDR
 
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 252e1272c3..42b3337216 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -194,9 +194,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_FSL_DDR_INTERACTIVE
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 49bb38279a..f385509daf 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -105,7 +105,6 @@
 #define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS1		0x54 /* I2C access */
 #define SPD_EEPROM_ADDRESS2		0x56 /* I2C access */
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 86a1233e32..1413b3dcfe 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -83,7 +83,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index b8a9b5c638..13ca2c395d 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -67,7 +67,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 13ad04e279..e00a56e2fd 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 6ad0849cec..280b873aee 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -45,7 +45,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index b09cbab292..be600becfe 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -56,7 +56,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index bac8456825..5b3933412c 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index d28a35f87b..5ba2b6d643 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -66,7 +66,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 5da70bb83e..9b3485ed4b 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -44,7 +44,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 0edcc2ed72..de5a7ca959 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index cff3ca9bce..13fbbb3044 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -73,7 +73,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index a3f29c5f9e..b534d4758b 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -72,7 +72,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS		CONFIG_SYS_CCSRBAR_PHYS_LOW
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD for DDR */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index bb6dd95d59..9318b190ae 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -97,7 +97,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * DDR Setup
  */
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index ada00ae8bb..4f6ee22385 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -59,7 +59,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE		512u	/* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0
 #define SPD_EEPROM_ADDRESS              0x50
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 673d1112e2..2a0d4cf230 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -236,7 +236,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_INTERACTIVE
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM	0
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 2d5c96f335..147ef71084 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -140,7 +140,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 1dcf2779d7..2da0fe09d2 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -189,9 +189,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR	2
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index ddb60b3d6d..656ad5317b 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -175,7 +175,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 42252c7c42..f42a4f4af0 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -112,7 +112,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 1bbe9d9b37..6a0254a55b 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -133,7 +133,6 @@
 #define CONFIG_DDR_SPD
 #endif
 #define CONFIG_SYS_SPD_BUS_NUM 1
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index a8f7300c1e..948bb8de49 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -94,7 +94,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x54
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 4ad98c69e6..d75ac4e57e 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -89,7 +89,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index ed07d9f28e..52b47ad670 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index a0d39878b8..6ab83d02a4 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -21,8 +21,6 @@
 
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#define CONFIG_FSL_DDR_BIST
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 886fe723ba..6e36baf4ca 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 77b50dbdad..f22e863749 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -24,10 +24,6 @@
 #define CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
-#define CONFIG_FSL_DDR_BIST	/* enable built-in memory test */
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#endif
 
 #ifdef CONFIG_SD_BOOT
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 95e6786e6c..e55c23631e 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -49,10 +49,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#if !defined(CONFIG_SD_BOOT)
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#endif
-
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 235a757f75..a248e13443 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -36,9 +36,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
-#endif
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h
index 76ac5363c5..d5cb3e4df9 100644
--- a/include/configs/ls2080a_emu.h
+++ b/include/configs/ls2080a_emu.h
@@ -24,8 +24,6 @@
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	1
 #endif
 
-#define CONFIG_FSL_DDR_SYNC_REFRESH
-
 #define CONFIG_SYS_NOR0_CSPR_EXT	(0x0)
 #define CONFIG_SYS_NOR_AMASK	IFC_AMASK(128*1024*1024)
 /*
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 2822811da5..df648e2675 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -42,7 +42,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	1
 #endif
-#define CONFIG_FSL_DDR_BIST	/* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -64,8 +63,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SECT_SIZE		0x20000
 #endif
 
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
-
 #define CONFIG_SYS_NOR0_CSPR_EXT	(0x0)
 #define CONFIG_SYS_NOR_AMASK		IFC_AMASK(128*1024*1024)
 #define CONFIG_SYS_NOR_AMASK_EARLY	IFC_AMASK(64*1024*1024)
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index ef0f4ff48e..e10afae6d7 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -57,7 +57,6 @@ unsigned long get_board_sys_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	1
 #endif
-#define CONFIG_FSL_DDR_BIST	/* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -80,7 +79,6 @@ unsigned long get_board_sys_clk(void);
 #endif
 
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT	(0x0)
 #define CONFIG_SYS_NOR_AMASK		IFC_AMASK(128*1024*1024)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 459ecf328f..2af10a2b75 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -264,7 +264,6 @@
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS 0x52
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD))
 #define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_2G
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index f0b165591c..9df8604af7 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_DDR_ECC			/* only for ECC DDR module */
 /*
  * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 9fa8917a9b..3f84fabdb6 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -60,7 +60,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index bca5961206..bf37501912 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -73,7 +73,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	2
 #define CONFIG_CHIP_SELECTS_PER_CTRL	4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 206f0c13a4..5737cfee95 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -25,7 +25,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index e6eea8dfc2..22dd3c036e 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -33,7 +33,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8c88031546..a4e73ae56b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -627,10 +627,6 @@ CONFIG_FSL_CADMUS
 CONFIG_FSL_CORENET
 CONFIG_FSL_CPLD
 CONFIG_FSL_DCU_SII9022A
-CONFIG_FSL_DDR_BIST
-CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
-CONFIG_FSL_DDR_INTERACTIVE
-CONFIG_FSL_DDR_SYNC_REFRESH
 CONFIG_FSL_DEEP_SLEEP
 CONFIG_FSL_DEVICE_DISABLE
 CONFIG_FSL_DIU_CH7301
-- 
2.17.1

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