[U-Boot] [PATCH 1/3] ARM: rmobile: Switch CPU to non-secure HYP mode for r8a7790 based boards

[Marek Vasut]

On 2/8/19 12:40 PM, Oleksandr wrote:
> 
> On 07.02.19 19:19, Oleksandr wrote:
>>
>> On 07.02.19 17:49, Marek Vasut wrote:
>>> On 2/7/19 4:28 PM, Oleksandr wrote:
>>>> On 05.02.19 20:48, Marek Vasut wrote:
>>>>
>>>> Hi Marek
>>> Hi,
>>
>> Hi,
>>
>>>
>>>>> On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
>>>>>> From: Oleksandr Tyshchenko <oleksandr_tyshchenko at epam.com>
>>>>>>
>>>>>> Both Lager and Stout boards are based on r8a7790 SoC.
>>>>>>
>>>>>> Leave platform specific functions for bringing seconadary CPUs up
>>>>>> empty,
>>>>>> since our target is to use PSCI for that.
>>>>>>
>>>>>> Also take care of updating arch timer while we are in secure mode.
>>>>>>
>>>>>> Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko at epam.com>
>>>>>> ---
>>>>>>    arch/arm/mach-rmobile/Kconfig.32 |  4 ++++
>>>>>>    board/renesas/lager/lager.c      | 51
>>>>>> ++++++++++++++++++++++++++++++++++++++++
>>>>>>    board/renesas/stout/stout.c      | 51
>>>>>> ++++++++++++++++++++++++++++++++++++++++
>>>>>>    include/configs/lager.h          |  3 +++
>>>>>>    include/configs/stout.h          |  3 +++
>>>>>>    5 files changed, 112 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm/mach-rmobile/Kconfig.32
>>>>>> b/arch/arm/mach-rmobile/Kconfig.32
>>>>>> index 076a019..a2e9e3d 100644
>>>>>> --- a/arch/arm/mach-rmobile/Kconfig.32
>>>>>> +++ b/arch/arm/mach-rmobile/Kconfig.32
>>>>>> @@ -76,6 +76,8 @@ config TARGET_LAGER
>>>>>>        select SUPPORT_SPL
>>>>>>        select USE_TINY_PRINTF
>>>>>>        imply CMD_DM
>>>>>> +    select CPU_V7_HAS_NONSEC
>>>>>> +    select CPU_V7_HAS_VIRT
>>>>> Shouldn't this be a H2 CPU property instead of a board property ?
>>>> Probably yes, sounds reasonable. I will move these options under
>>>> "config
>>>> R8A7790".
>>>>
>>>>> Does this apply to M2* too , since it has CA15 cores as well ?
>>>> I think, yes. But, without PSCI support being implemented for M2*, I
>>>> think it is not worth to select these options for it as well.
>>> It's basically the same SoC with two CPU cores less, how would that PSCI
>>> be any different on M2 ?
>> I need some time to investigate. I will come up with an answer later.
> 
> From the first look:
> 
> 1. It should be different total number of CPUs:
> 
> For R8A7790 we have the following:
> 
> #define R8A7790_PSCI_NR_CPUS    8
> 
> But for R8A7791 it seems we need to use:
> 
> #define R8A7791_PSCI_NR_CPUS    2

This information should be in the DT for each SoC, so you should extract
it from there.

> 2. It should be new pm-r8a7791.c file which will don't have any CA7
> related stuff (CPU cores, SCU, etc).

I'd like to have a generic pm-gen2.c file , which parses the DT and
figures the configuration out that way. We are trying to get rid of all
the ad-hoc hardcoded configuration stuff in favor of DT.

> Or it should be the single pm-r8a779x.c which must distinguish what SoC
> is being used and do proper things.

Right

[...]

-- 
Best regards,
Marek Vasut