[U-Boot] [U-Boot,6/7] dts: stm32mp1: clock tree update

[Tom Rini]

On Wed, Jan 30, 2019 at 01:07:05PM +0100, Patrick Delaunay wrote:

> - Add st,digbypass on clk_hse node (needed for board rev.C)
> - MLAHB/AHB max frequency increased from 200 to 209MHz, with:
>   - PLL3P set to 208.8MHz for MCU sub-system
>   - PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
>   - PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
>   - PLL4P set to 99MHz for SDMMC and SPDIFRX
>   - PLL4Q set to 74.25MHz for EVAL board
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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