[U-Boot] [PATCH 15/33] x86: sandbox: pch: Add a CONFIG option for PCH

[Jean-Jacques Hiblot]

On 22/01/2019 02:12, Simon Glass wrote:
> At present this uclass is selected only on x86. In order to add a test for
> it, it must also support sandbox. Create a new CONFIG_PCH option and
> enable it on x86 and sandbox.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>   arch/Kconfig        | 2 ++
>   drivers/Kconfig     | 2 ++
>   drivers/Makefile    | 2 +-
>   drivers/pch/Kconfig | 9 +++++++++
>   4 files changed, 14 insertions(+), 1 deletion(-)
>   create mode 100644 drivers/pch/Kconfig
>
> diff --git a/arch/Kconfig b/arch/Kconfig
> index 35e2712fce..d9afe269f2 100644
> --- a/arch/Kconfig
> +++ b/arch/Kconfig
> @@ -117,6 +117,7 @@ config SANDBOX
>   	imply VIRTIO_BLK
>   	imply VIRTIO_NET
>   	imply DM_SOUND
> +	imply PCH
>   
>   config SH
>   	bool "SuperH architecture"
> @@ -160,6 +161,7 @@ config X86
>   	imply USB_ETHER_ASIX
>   	imply USB_ETHER_SMSC95XX
>   	imply USB_HOST_ETHER
> +	imply PCH
>   
>   config XTENSA
>   	bool "Xtensa architecture"
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index e9fbadd13d..f24351ac4f 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -64,6 +64,8 @@ source "drivers/nvme/Kconfig"
>   
>   source "drivers/pci/Kconfig"
>   
> +source "drivers/pch/Kconfig"
> +
>   source "drivers/pcmcia/Kconfig"
>   
>   source "drivers/phy/Kconfig"
> diff --git a/drivers/Makefile b/drivers/Makefile
> index 4105864e2b..62722146c4 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -87,7 +87,7 @@ obj-$(CONFIG_MMC) += mmc/
>   obj-$(CONFIG_NVME) += nvme/
>   obj-y += pcmcia/
>   obj-y += dfu/
> -obj-$(CONFIG_X86) += pch/
> +obj-$(CONFIG_PCH) += pch/
>   obj-y += phy/allwinner/
>   obj-y += phy/marvell/
>   obj-y += rtc/
> diff --git a/drivers/pch/Kconfig b/drivers/pch/Kconfig
> new file mode 100644
> index 0000000000..18f006de24
> --- /dev/null
> +++ b/drivers/pch/Kconfig
> @@ -0,0 +1,9 @@
> +config PCH
> +	bool "Enable Platform-controller Hub (PCH) support"
> +	depends on X86 || SANDBOX
> +	help
> +	  Most x86 chips include a PCH which is responsible for handling
> +	  parts of the system not handled by that CPU. It supersedes the
> +	  northbridge / southbridge architecture that was previously used. The
> +	  PCH allows for higher performance since the memory functions are
> +	  handled in the CPU.

Reviewed-by: Jean-Jacques Hiblot <jjhiblot at ti.com>