[U-Boot] [PATCH] arm: socfpga: move gen5 SDR driver to DM

[Dinh Nguyen]

Hi Marek,

On 2/9/19 4:01 AM, Marek Vasut wrote:
> On 2/7/19 10:23 PM, Simon Goldschmidt wrote:
>> To clean up reset handling for socfpga gen5, let's move the code snippet
>> taking the DDR controller out of reset from SPL to the DDR driver.
>>
>> While at it, port the ddr driver to UCLASS_RAM and use dts.
>>
>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
>> ---
>>
>> This is an RFC to show what the SDRAM driver moved to DM (UCLASS_RAM) would
>> look like. It's RFC both because Dinh did not seem too fond of changing the
>> register address of the SDR in devicetree to include what the undocumented
>> registers 'sequencer.c' uses as well as because of my observed code growth.
> 
> Dinh, if the SDRAM controller spans some addresses, it should be
> described like so in the DT. Whether those registers are documented or
> not does not matter, DT is a hardware description and should describe
> hardware accurately.

Yes, I agree with above statement. I'll wait for this patch to land here
and will take the DTS patch to sync up Linux and U-Boot DTS.

Dinh