[U-Boot] [PATCH 5/7] riscv: add support for multi-hart systems

[Auer, Lukas]

Hi Rick,

On Fri, 2019-02-15 at 14:51 +0800, Rick Chen wrote:
> Hi Lukas
> 
> > > From: Lukas Auer [mailto:lukas.auer at aisec.fraunhofer.de]
> > > Sent: Tuesday, February 12, 2019 6:14 AM
> > > To: u-boot at lists.denx.de
> > > Cc: Atish Patra; Anup Patel; Bin Meng; Andreas Schwab; Palmer
> > > Dabbelt;
> > > Alexander Graf; Lukas Auer; Anup Patel; Rick Jian-Zhi Chen(陳建志);
> > > Baruch Siach;
> > > Stefan Roese
> > > Subject: [PATCH 5/7] riscv: add support for multi-hart systems
> > > 
> > > On RISC-V, all harts boot independently. To be able to run on a
> > > multi-hart system,
> > > U-Boot must be extended with the functionality to manage all
> > > harts in the
> > > system. A new config option, CONFIG_MAIN_HART, is used to select
> > > the hart
> > > U-Boot runs on. All other harts are halted.
> > > U-Boot can delegate functions to them using smp_call_function().
> > > 
> > > Every hart has a valid pointer to the global data structure and a
> > > 8KiB stack by
> > > default. The stack size is set with CONFIG_STACK_SIZE_SHIFT.
> > > 
> > > Signed-off-by: Lukas Auer <lukas.auer at aisec.fraunhofer.de>
> > > ---
> > > 
> > >  arch/riscv/Kconfig           |  12 +++++
> > >  arch/riscv/cpu/start.S       | 102
> > > ++++++++++++++++++++++++++++++++++-
> > >  arch/riscv/include/asm/csr.h |   1 +
> > >  3 files changed, 114 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index
> > > 3a51339c4d..af8d0f8d67
> > > 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -140,4 +140,16 @@ config SBI_IPI
> > >       default y if RISCV_SMODE
> > >       depends on SMP
> > > 
> > > +config MAIN_HART
> > > +     int "Main hart in system"
> > > +     default 0
> > > +     help
> > > +       Some SoCs include harts of various sizes, some of which
> > > might not
> > > +       be suitable for running U-Boot. CONFIG_MAIN_HART is used
> > > to select
> > > +       the hart U-Boot runs on.
> > > +
> > > +config STACK_SIZE_SHIFT
> > > +     int
> > > +     default 13
> > > +
> > >  endmenu
> > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > > index
> > > a30f6f7194..ce7230df37 100644
> > > --- a/arch/riscv/cpu/start.S
> > > +++ b/arch/riscv/cpu/start.S
> > > @@ -13,6 +13,7 @@
> > >  #include <config.h>
> > >  #include <common.h>
> > >  #include <elf.h>
> > > +#include <asm/csr.h>
> > >  #include <asm/encoding.h>
> > >  #include <generated/asm-offsets.h>
> > > 
> 
> If u-boot boot from flash by itself in M-mode without any FSBL or
> gdb,
> in this case there will be no chance to assign a0.
> Can we add some code as below :
> 
>  _start:
> +#ifdef CONFIG_RISCV_MMODE
> +       csrr    a0, mhartid
> +#endif
>         /* save hart id and dtb pointer */
>         mv      s0, a0
>         mv      s1, a1
> 
> How do you think about it ?
> 

Good point, thanks! Even without SMP support this could cause issues if
we pass an invalid hart ID to Linux. I will add a patch for this.

Thanks,
Lukas

> Thanks
> Rick
> 
> 
> > > @@ -45,6 +46,23 @@ _start:
> > >       /* mask all interrupts */
> > >       csrw    MODE_PREFIX(ie), zero
> > > 
> > > +#ifdef CONFIG_SMP
> > > +     /* check if hart is within range */
> > > +     /* s0: hart id */
> > > +     li      t0, CONFIG_NR_CPUS
> > > +     bge     s0, t0, hart_out_of_bounds_loop
> > > +#endif