[U-Boot] [PATCH v2 4/8] spi: sun4i: Access registers and bits via enum offsets

Jagan Teki jagan at amarulasolutions.com
Mon Feb 18 10:04:12 UTC 2019


On Fri, Feb 15, 2019 at 5:28 AM André Przywara <andre.przywara at arm.com> wrote:
>
> On 14/02/2019 08:36, Jagan Teki wrote:
> > Allwinner support two different SPI controllers one for A10 and
> > another for A31 with minimal changes in register offsets and
> > respective register bits, but the logic for accessing the SPI
> > master via SPI slave remains nearly similar.
> >
> > Add enum offsets for register set and register bits, so-that
> > it can access both classes of SPI controllers.
> >
> > Assign same control register for global, transfer and fifo control
> > registers to make the same code compatible with A31 SPI controller.
> >
> > Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> > ---
> > Note: SPI_REG still seems to have checkpatch warning.
>
> It's a CHECK, and it's fine, as long as you pass only "priv" in, at
> least. I think we can leave it this way.

I tried many way to clear this warning, but seems like it not possible
programmitacally using these macro assignement. Do you have any idea
how to fix this? one way to use direct function calls instead of macro
assigement but that would eventaully add another code.


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