[U-Boot] [RFC 09/22] pci: fix pce enumeration on thunderx

[Tim Harvey]

TODO:
 - determine proper workaround for disabling found_multi
 - determine proper workaround for decode_regions

Signed-off-by: Tim Harvey <tharvey at gateworks.com>
---
 drivers/pci/pci-uclass.c | 12 ++++++++++++
 include/pci.h            |  2 +-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 0720ffe5b4..845e280a60 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -783,8 +783,11 @@ int pci_bind_bus_devices(struct udevice *bus)
 		struct udevice *dev;
 		ulong class;
 
+/* causes devices beyond the internal bridge on the Octeon TX to not enum */
+#if !defined(CONFIG_ARCH_THUNDERX)
 		if (!PCI_FUNC(bdf))
 			found_multi = false;
+#endif
 		if (PCI_FUNC(bdf) && !found_multi)
 			continue;
 		/* Check only the first access, we don't expect problems */
@@ -910,6 +913,9 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 			continue;
 		}
 
+#if defined(CONFIG_ARCH_THUNDERX)
+		pos = hose->region_count++;
+#else
 		pos = -1;
 		for (i = 0; i < hose->region_count; i++) {
 			if (hose->regions[i].flags == type)
@@ -917,10 +923,16 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 		}
 		if (pos == -1)
 			pos = hose->region_count++;
+#endif
 		debug(" - type=%d, pos=%d\n", type, pos);
 		pci_set_region(hose->regions + pos, pci_addr, addr, size, type);
 	}
 
+	if (hose->region_count == MAX_PCI_REGIONS) {
+		printf("PCI region count reached limit, cannot add local memory region");
+		return;
+	}
+
 	/* Add a region for our local memory */
 #ifdef CONFIG_NR_DRAM_BANKS
 	bd_t *bd = gd->bd;
diff --git a/include/pci.h b/include/pci.h
index 033d5adf2a..38d44d5b67 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -567,7 +567,7 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
 				      struct pci_config_table *);
 
-#define MAX_PCI_REGIONS		7
+#define MAX_PCI_REGIONS		10
 
 #define INDIRECT_TYPE_NO_PCIE_LINK	1
 
-- 
2.17.1