[U-Boot] [PATCH 3/3] mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X

[Daniel Schwierzeck]

Am 15.02.19 um 12:56 schrieb Rosy Song:
> Signed-off-by: Rosy Song <rosysong at rosinson.com>

this should have some commit message explaining the error. In fact all
of your commits should have some meaningful commit message.


> ---
>  arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> index 380f387a26..016679e0f8 100644
> --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> @@ -551,7 +551,7 @@
>  #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT		0
>  #define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK		0x1f
>  #define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT		5
> -#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK		0x3fff
> +#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK		0x1fff
>  #define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT		18
>  #define QCA956X_PLL_CPU_CONFIG1_NINT_MASK		0x1ff
>  
> @@ -563,7 +563,7 @@
>  #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT		0
>  #define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK		0x1f
>  #define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT		5
> -#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK		0x3fff
> +#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK		0x1fff
>  #define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT		18
>  #define QCA956X_PLL_DDR_CONFIG1_NINT_MASK		0x1ff
>  
> 

-- 
- Daniel