[U-Boot] Problems to boot i.MX8QXP EVK board

Peng Fan peng.fan at nxp.com
Fri Jan 18 08:02:49 UTC 2019


Hi Fabio, Breno

> -----Original Message-----
> From: Fabio Estevam [mailto:festevam at gmail.com]
> Sent: 2019年1月17日 19:30
> To: Breno Matheus Lima <brenomatheus at gmail.com>; Peng Fan
> <peng.fan at nxp.com>
> Cc: Breno Matheus Lima <breno.lima at nxp.com>; Fabio Estevam
> <fabio.estevam at nxp.com>; U-Boot-Denx <u-boot at lists.denx.de>;
> dl-uboot-imx <uboot-imx at nxp.com>
> Subject: Re: Problems to boot i.MX8QXP EVK board
> 
> Hi Peng,
> 
> On Thu, Jan 17, 2019 at 8:27 AM Breno Matheus Lima
> <brenomatheus at gmail.com> wrote:
> 
> > Hi Peng,
> >
> > I'm using the following versions:
> >
> > - U-Boot upstream v2019.01
> > - ATF from NXP codeaurora (rel_imx_4.14.78_1.0.0_ga)
> > - SCFW binary from imx-sc-firmware-1.1 package
> > - SECO FW from firmware-imx-8.0 package
> >
> > The same issue still happening, I can only boot my board after
> > reverting commit f7e475db4011("tools: imx8image: set dcd_skip to
> > true").

The commit log for the patch is not that correct. I miss understanding dcd skip previously.
After set dcd_skip to true, non-spl version uboot could not be started.

I do not see log from SPL part,

My log:
U-Boot SPL 2019.01-rc3-00052-gc74bdbad65-dirty (Jan 18 2019 - 16:05:58 +0800)
Normal Boot
Trying to boot from MMC2_2


U-Boot 2019.01-rc3-00052-gc74bdbad65-dirty (Jan 18 2019 - 16:05:58 +0800)

CPU:   NXP i.MX8QXP RevB A35 at 147228 MHz

Model: Freescale i.MX8QXP MEK
Board: iMX8QXP MEK
Build: SCFW e1f0ae76
Boot:  SD1
DRAM:  3 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial at 5a060000
Out:   serial at 5a060000
Err:   serial at 5a060000
Net:   eth-1: ethernet at 5b040000
Hit any key to stop autoboot:  0

> >
> > As you can see in log below, SCFW top is 65afe5f6:
> >
> > U-Boot 2019.01-00001-g2df3ad4767 (Jan 17 2019 - 08:15:39 -0200)
> >
> > CPU:   NXP i.MX8QXP RevB A35 at 147228 MHz
> 
> The reported frequency is 147.2 GHz. Do you have a fix for this?

I do not have patch currently. You could fix it if you would like to do.

> 
> > Model: Freescale i.MX8QXP MEK
> > Board: iMX8QXP MEK
> > Build: SCFW 65afe5f6
> > Boot:  SD1
> > DRAM:  3 GiB
> > MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> > Loading Environment from MMC... *** Warning - bad CRC, using default
> > environment
> 
> Should we revert f7e475db4011 ("tools: imx8image: set dcd_skip to true")?

The code default switch to SPL, the non-spl uboot not supported based on this patch.
The commit log is wrong, but I do not prefer to revert it. A new option could be provided
to let people choose dcd_skip to true or false.

Thanks,
Peng.


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