[U-Boot] [PATCH v1 06/15] dm: clk: imx: Add support for controlling imx6q clocks via Driver Model

Lukasz Majewski lukma at denx.de
Mon Jan 21 14:19:26 UTC 2019


Hi Fabio,

> Hi Lukasz,
> 
> On Sat, Jan 19, 2019 at 7:15 AM Lukasz Majewski <lukma at denx.de> wrote:
> 
> > +static ulong imx6q_clk_get_rate(struct clk *clk)
> > +{
> > +       ulong rate = 0;
> > +
> > +       debug("%s(#%lu)\n", __func__, clk->id);
> > +
> > +       switch (clk->id) {
> > +       case IMX6QDL_CLK_ECSPI1:
> > +       case IMX6QDL_CLK_ECSPI2:
> > +       case IMX6QDL_CLK_ECSPI3:
> > +       case IMX6QDL_CLK_ECSPI4:
> > +               return imx6_get_cspi_clk();
> > +
> > +       case IMX6QDL_CLK_USDHC1:
> > +       case IMX6QDL_CLK_USDHC2:
> > +       case IMX6QDL_CLK_USDHC3:
> > +       case IMX6QDL_CLK_USDHC4:
> > +               return imx6_get_usdhc_clk(clk->id -
> > IMX6QDL_CLK_USDHC1);  
> 
> I don't think this scales well as this needs to grow for all other
> peripherals and for each port instance.

The rationale regarding this approach:

1. Reuse the clock.c code for iMX6Q as much as possible.

2, This code is based on the clk-imx8q.c file -  hence the question
why the Linux clock API was not ported for this new SoC?.

> 
> If we are adding a clock driver for mx6, why don't we add it just like
> the kernel one?

I can try to port the Linux code, but IMHO it would be feasible to port
only relevant (ECSPI, USDHC) parts of it (not all as I cannot test it
all properly).

> 
> Barebox imports the clock driver from the kernel and it is much
> cleaner:
> https://git.pengutronix.de/cgit/barebox/tree/drivers/clk/imx/clk-imx6.c

Yes, it has been trimmed (...a bit...) when compared to original
v4.20 :-) .


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
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Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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