[U-Boot] [PATCH v2] arm: mvebu: theadorable: Enable video / LCD support with the new DM driver

[Stefan Roese]

With the new DM_VIDEO support in the Armada XP LCD driver, this patch
adds the needed DT node for the LCD controller to the theadorable dts
file. This DT property is not added to the Armada XP dtsi files, as this
LCD feature is pretty unusual for this SoC and I personally know of no
other board that uses this controller.

This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp
command supported these BMP files.

Signed-off-by: Stefan Roese <sr at denx.de>
Reviewed-by: Anatolij Gustschin <agust at denx.de>
---
v2:
- Remove theadorable_debug_config change (its included in the video driver
  patch now)
- Commit text reworded because of this

 arch/arm/dts/armada-xp-theadorable.dts | 25 +++++++++++++++++++++++++
 include/configs/theadorable.h          |  4 ++++
 2 files changed, 29 insertions(+)

diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index 9b66ec678d..5695e9b758 100644
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -159,6 +159,31 @@
 					spi-max-frequency = <27777777>;
 				};
 			};
+
+			/* The LCD controller is only used on this board */
+			lcd0: lcd-controller at e0000 {
+				compatible = "marvell,armada-xp-lcd";
+				reg = <0xe0000 0x10000>;
+				status = "okay";
+				u-boot,dm-pre-reloc;
+
+				display-timings {
+					native-mode = <&timing0>;
+					timing0: panel0 {
+						hactive = <240>;
+						vactive = <320>;
+						hfront-porch = <1>;
+						hback-porch = <45>;
+						vfront-porch = <1>;
+						vback-porch = <3>;
+
+						/* Some dummy parameters */
+						clock-frequency = <0>;
+						hsync-len = <0>;
+						vsync-len = <0>;
+					};
+				};
+			};
 		};
 	};
 };
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 6837d55507..d0c75757ed 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -65,6 +65,10 @@
 /* Enable LCD and reserve 512KB from top of memory*/
 #define CONFIG_SYS_MEM_TOP_HIDE		0x80000
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 /* FPGA programming support */
 #define CONFIG_FPGA_STRATIX_V
 
-- 
2.20.1