[U-Boot] [PATCH 5/6] arm: socfpga: gen5: add readonly clk driver

[Marek Vasut]

On 7/24/19 10:24 AM, Simon Goldschmidt wrote:
> On Wed, Jul 24, 2019 at 9:51 AM Marek Vasut <marex at denx.de> wrote:
>>
>> On 7/24/19 9:45 AM, Simon Goldschmidt wrote:
>>> On Wed, Jul 24, 2019 at 9:31 AM Marek Vasut <marex at denx.de> wrote:
>>>>
>>>> On 7/23/19 10:27 PM, Simon Goldschmidt wrote:
>>>>> This adds clk-gen5 as a readonly DM_CLK driver that can return clocks for
>>>>> the peripherals.
>>>>>
>>>>> Further changes are:
>>>>> - select DM_CLK for gen5 U-Boot and SPL
>>>>> - add SPL tags to clock nodes in socfpga-common-u-boot.dtsi
>>>>> - adjust socfpga.dtsi to provide missing src selection registers
>>>>> - start 'handoff.dtsi' file for socrates (conatains clock speeds for now)
>>>>
>>>> These should likely be separate patches then ?
>>>
>>> Well, in the end, yes. Especially the handoff.dtsi is required for *all*
>>> socfpga_gen5 boards, so I'll need to adapt the 'qts-filter.sh' script to
>>> generate it.
>>>
>>> I'll change that script and separate these patches in v2.
>>
>> You probably also want to add DM_FLAG_PRE_RELOC and possibly
>> DM_FLAG_OS_PREPARE to tear down some clock before booting Linux.
> 
> Ack for DM_FLAG_PRE_RELOC, but I don't know about DM_FLAG_OS_PREPARE,
> as that could at least bring portability issues with Linux versions
> that can't control
> the pripheral clocks (I don't know if that's implemented at all in Linux, yet).

Probably the same issues we see with reset, right ?

> Plus this is currently a readonly driver, so it returns the rate only
> and doesn't
> set/enable/disable anything. I've planned that for the future, but
> it's not there, yet.

OK