[U-Boot] [PATCH v3 04/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux

[Kever Yang]

On 04/16/2019 09:50 PM, David Wu wrote:
> RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
> bits, need to read before write the register.
>
> Signed-off-by: David Wu <david.wu at rock-chips.com>

Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>
> Change in v3:
> - Add some comment
>
>  drivers/pinctrl/rockchip/pinctrl-rk3288.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
> index 1fa601d954..5040cd8f48 100644
> --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
> @@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
>  		}
>  	}
>  
> -	data = (mask << (bit + 16));
> +	/* bank0 is special, there are no higher 16 bit writing bits. */
> +	if (bank->bank_num == 0) {
> +		regmap_read(regmap, reg, &data);
> +		data &= ~(mask << bit);
> +	} else {
> +		/* enable the write to the equivalent lower bits */
> +		data = (mask << (bit + 16));
> +	}
> +
>  	data |= (mux & mask) << bit;
>  	ret = regmap_write(regmap, reg, data);
>