[PATCH 1/1] riscv: sifive: fu540: redundant initialization

Pragnesh Patel pragnesh.patel at sifive.com
Tue Aug 4 07:50:41 CEST 2020


>-----Original Message-----
>From: Heinrich Schuchardt <xypron.glpk at gmx.de>
>Sent: 04 August 2020 02:40
>To: Rick Chen <rick at andestech.com>
>Cc: Pragnesh Patel <pragnesh.patel at sifive.com>; Bin Meng
><bmeng.cn at gmail.com>; u-boot at lists.denx.de; Heinrich Schuchardt
><xypron.glpk at gmx.de>
>Subject: [PATCH 1/1] riscv: sifive: fu540: redundant initialization
>
>[External Email] Do not click links or attachments unless you recognize the
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>We should not initialize a variable if the value is overwritten before being read.
>
>Signed-off-by: Heinrich Schuchardt <xypron.glpk at gmx.de>
>---
> arch/riscv/cpu/fu540/cache.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel at sifive.com>


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