[PATCH v1 1/2] arm: socfpga: soc64: Add SDM triggered warm reset bit mask

[Tan, Ley Foon]

> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang at intel.com>
> Sent: Wednesday, August 5, 2020 9:16 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Tom Rini <trini at konsulko.com>; See,
> Chin Liang <chin.liang.see at intel.com>; Tan, Ley Foon
> <ley.foon.tan at intel.com>; Ang, Chee Hong <chee.hong.ang at intel.com>;
> Chee, Tien Fong <tien.fong.chee at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: [PATCH v1 1/2] arm: socfpga: soc64: Add SDM triggered warm reset
> bit mask
> 
> Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat register
> when checking for HPS warm reset status.
> Refactor the warm reset mask macro for clarity purpose.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> ---
>  arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h | 11
> +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 

Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>