[PATCH v1 2/2] arm: socfpga: soc64: Show reset state in SPL

Tan, Ley Foon ley.foon.tan at intel.com
Thu Aug 6 04:05:30 CEST 2020



> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang at intel.com>
> Sent: Wednesday, August 5, 2020 9:16 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Tom Rini <trini at konsulko.com>; See,
> Chin Liang <chin.liang.see at intel.com>; Tan, Ley Foon
> <ley.foon.tan at intel.com>; Ang, Chee Hong <chee.hong.ang at intel.com>;
> Chee, Tien Fong <tien.fong.chee at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: [PATCH v1 2/2] arm: socfpga: soc64: Show reset state in SPL
> 
> Print reset state (warm/cold) together with the source (watchdog/MPU)
> which has triggered the warm reset on S10 & Agilex.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> ---
>  .../include/mach/reset_manager_soc64.h             |  1 +
>  arch/arm/mach-socfpga/reset_manager_s10.c          | 22
> ++++++++++++++++++++++
>  arch/arm/mach-socfpga/spl_agilex.c                 |  1 +
>  arch/arm/mach-socfpga/spl_s10.c                    |  1 +
>  4 files changed, 25 insertions(+)
> 

Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>


More information about the U-Boot mailing list