[PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images

[Marek Vasut]

On 8/6/20 3:50 AM, Tan, Ley Foon wrote:

Hi,

>>>>>>> diff --git a/Makefile b/Makefile
>>>>>>> index 2629a74..13429a0 100644
>>>>>>> --- a/Makefile
>>>>>>> +++ b/Makefile
>>>>>>> @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
>>>>>> FORCE
>>>>>>> ifneq ($(CONFIG_ARCH_SOCFPGA),)  quiet_cmd_socboot = SOCBOOT
>>>> $@
>>>>>>>  cmd_socboot = cat	spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
>>>>>>> -			spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
>>>>>>> -			u-boot.img > $@ || rm -f $@
>>>>>>> +			spl/u-boot-spl.sfp \
>>>>>>> +			spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \
>>>>>>> +	      cat	spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
>>>>>>
>>>>>> Isn't that what the existing code does already ?
>>>>>>
>>>>>> Also, this will I think fail on 128k erase block size NAND due to
>>>>>> missing padding.
>>>>> This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL
>>>>> images,
>>>> each SPL image size is 256KB.
>>>>> So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB).
>>>>> Shouldn't have
>>>> problem for 128KB erase size NAND.
>>>>
>>>> Isn't the SPL padded to 64 kiB each ?
>>> Cyclone 5 and Arria 10 have different size.
>>>
>>> Cyclone 5 SPL: 64KB each, spl/u-boot-splx4.sfp is 256KB
>>>
>>> Arria 10 SPL: 256KB each, spl/u-boot-splx4.sfp is 1MB
>>
>> So are you sure this will work on NAND with 128 kiB erase blocks on CV/AV ?
>> I think you will run into problems with padding there. But maybe we don't
>> support that anyway, so add a comment and be done with it.
> If the erase block size is 128KB and we program the spl/u-boot-splx4.sfp with 256KB for Cyclone5. It consumes 2 erase block size, why do you think it will have problem?

See "Figure A-7: NAND Flash Image Layout for 128 KB Memory Blocks" in
Cyclone V datasheet, appending A.

> By the way, tested spl/u-boot-splx4.sfp on Arria 10 NAND with 128KB erase block size, it is working.

Isn't that only because it picks the first SPL copy and it accidentally
works fine ? Try to write in an image with SPL 0,2,3 corrupted and only
SPL 1 valid , then it wont boot I think.