[PATCH v1] arm: socfpga: soc64: Add timeout waiting for NOC idle ACK
Chee Hong Ang
chee.hong.ang at intel.com
Mon Aug 10 16:59:49 CEST 2020
Add timeout waiting for NOC idle ACK during FPGA bridge
disable/enable.
Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
---
arch/arm/mach-socfpga/reset_manager_s10.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index c743077..e5eb7f4 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -9,6 +9,7 @@
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
+#include <linux/iopoll.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,6 +55,8 @@ void socfpga_per_reset_all(void)
void socfpga_bridges_reset(int enable)
{
+ u32 reg;
+
if (enable) {
/* clear idle request to all bridges */
setbits_le32(socfpga_get_sysmgr_addr() +
@@ -64,9 +67,9 @@ void socfpga_bridges_reset(int enable)
~0);
/* Poll until all idleack to 0 */
- while (readl(socfpga_get_sysmgr_addr() +
- SYSMGR_SOC64_NOC_IDLEACK))
- ;
+ read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLEACK, reg, !reg, 1000,
+ 300000);
} else {
/* set idle request to all bridges */
writel(~0,
@@ -77,14 +80,18 @@ void socfpga_bridges_reset(int enable)
writel(1, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT);
/* Poll until all idleack to 1 */
- while ((readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_IDLEACK) ^
- (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK)))
- ;
+ read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLEACK, reg,
+ reg == (SYSMGR_NOC_H2F_MSK |
+ SYSMGR_NOC_LWH2F_MSK),
+ 1000, 300000);
/* Poll until all idlestatus to 1 */
- while ((readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_IDLESTATUS) ^
- (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK)))
- ;
+ read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLESTATUS, reg,
+ reg == (SYSMGR_NOC_H2F_MSK |
+ SYSMGR_NOC_LWH2F_MSK),
+ 1000, 300000);
/* Reset all bridges (except NOR DDR scheduler & F2S) */
setbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_SOC64_BRGMODRST,
--
2.2.0
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