[PATCH v1 01/15] x86: Introduce USE_EARLY_BOARD_INIT option

[Park, Aiden]

> -----Original Message-----
> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
> Sent: Thursday, August 6, 2020 7:54 AM
> To: Simon Glass <sjg at chromium.org>; Bin Meng <bmeng.cn at gmail.com>; u-
> boot at lists.denx.de
> Cc: Andy Shevchenko <andriy.shevchenko at linux.intel.com>; Park, Aiden
> <aiden.park at intel.com>; Stefan Roese <sr at denx.de>; George McCollister
> <george.mccollister at gmail.com>
> Subject: [PATCH v1 01/15] x86: Introduce USE_EARLY_BOARD_INIT option
> 
> Introduce USE_EARLY_BOARD_INIT option and select it by the actual users.
> 
> Cc: Aiden Park <aiden.park at intel.com>
> Cc: Stefan Roese <sr at denx.de>
> Cc: George McCollister <george.mccollister at gmail.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
> ---
>  arch/x86/Kconfig                      | 3 +++
>  arch/x86/cpu/start.S                  | 3 +++
>  board/google/chromebook_coral/Kconfig | 1 +
> board/google/chromebook_link/Kconfig  | 1 +
> board/google/chromebook_samus/Kconfig | 1 +
>  5 files changed, 9 insertions(+)
> 
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index
> ff4f06ed79cc..167cc96205c5 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT
>  	help
>  	  This is enabled when 32-bit init is in SPL
> 
> +config USE_EARLY_BOARD_INIT
> +	bool
> +
>  config RESET_SEG_START
>  	hex
>  	depends on X86_RESET_VECTOR
> diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index
> 4ad515ce0856..8d00c97db42c 100644
> --- a/arch/x86/cpu/start.S
> +++ b/arch/x86/cpu/start.S
> @@ -88,6 +88,7 @@ _start:
>  	/* Clear the interrupt vectors */
>  	lidt	blank_idt_ptr
> 
> +#ifdef USE_EARLY_BOARD_INIT
>  	/*
>  	 * Critical early platform init - generally not used, we prefer init
>  	 * to happen later when we have a console, in case something goes @@
> -96,6 +97,8 @@ _start:
>  	jmp	early_board_init
>  .globl early_board_init_ret
>  early_board_init_ret:
> +#endif
> +
>  	post_code(POST_START)
> 
>  	/* Initialise Cache-As-RAM */
> diff --git a/board/google/chromebook_coral/Kconfig
> b/board/google/chromebook_coral/Kconfig
> index 940bee89b0b6..27671958e146 100644
> --- a/board/google/chromebook_coral/Kconfig
> +++ b/board/google/chromebook_coral/Kconfig
> @@ -18,6 +18,7 @@ config SYS_TEXT_BASE
>  config BOARD_SPECIFIC_OPTIONS # dummy
>  	def_bool y
>  	select X86_RESET_VECTOR
> +	select USE_EARLY_BOARD_INIT
>  	select INTEL_APOLLOLAKE
>  	select BOARD_ROMSIZE_KB_16384
> 
> diff --git a/board/google/chromebook_link/Kconfig
> b/board/google/chromebook_link/Kconfig
> index 944716d002c9..dd29ddf694be 100644
> --- a/board/google/chromebook_link/Kconfig
> +++ b/board/google/chromebook_link/Kconfig
> @@ -19,6 +19,7 @@ config SYS_TEXT_BASE
>  config BOARD_SPECIFIC_OPTIONS # dummy
>  	def_bool y
>  	select X86_RESET_VECTOR
> +	select USE_EARLY_BOARD_INIT
>  	select NORTHBRIDGE_INTEL_IVYBRIDGE
>  	select HAVE_INTEL_ME
>  	select BOARD_ROMSIZE_KB_8192
> diff --git a/board/google/chromebook_samus/Kconfig
> b/board/google/chromebook_samus/Kconfig
> index 90c23cba1bed..9f66d7998870 100644
> --- a/board/google/chromebook_samus/Kconfig
> +++ b/board/google/chromebook_samus/Kconfig
> @@ -19,6 +19,7 @@ config SYS_TEXT_BASE
>  config BOARD_SPECIFIC_OPTIONS # dummy
>  	def_bool y
>  	select X86_RESET_VECTOR
> +	select USE_EARLY_BOARD_INIT
>  	select INTEL_BROADWELL
>  	select HAVE_INTEL_ME
>  	select BOARD_ROMSIZE_KB_8192
> --
> 2.27.0

Reviewed-by: Aiden Park <aiden.park at intel.com>