[PATCH v2 03/25] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Stefan Roese
sr at denx.de
Mon Aug 17 09:07:40 CEST 2020
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.
Signed-off-by: Stefan Roese <sr at denx.de>
Reviewed-by: Simon Glass <sjg at chromium.org>
Cc: Tom Rini <trini at konsulko.com>
Cc: Bin Meng <bmeng.cn at gmail.com>
---
Changes in v2:
- Add Reviewed-by tag from Simon
Changes in v1:
- New patch
drivers/pci/pci-uclass.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 40cc9f1090..601557a875 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -871,6 +871,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
ofnode node)
{
int pci_addr_cells, addr_cells, size_cells;
+ struct bd_info *bd = gd->bd;
int cells_per_record;
const u32 *prop;
int len;
@@ -938,9 +939,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
}
/* Add a region for our local memory */
-#ifdef CONFIG_NR_DRAM_BANKS
- struct bd_info *bd = gd->bd;
-
if (!bd)
return;
@@ -958,19 +956,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
}
}
-#else
- phys_addr_t base = 0, size;
-
- size = gd->ram_size;
-#ifdef CONFIG_SYS_SDRAM_BASE
- base = CONFIG_SYS_SDRAM_BASE;
-#endif
- if (gd->pci_ram_top && gd->pci_ram_top < base + size)
- size = gd->pci_ram_top - base;
- if (size)
- pci_set_region(hose->regions + hose->region_count++, base,
- base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-#endif
return;
}
--
2.28.0
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