Revert "ARM: socfpga: Remove socfpga_sdram_apply_static_cfg()

Wolfgang Grandegger wg at
Thu Aug 20 10:35:47 CEST 2020


Am 19.08.20 um 21:54 schrieb Ralph Siemsen:
> On Wed, Aug 19, 2020 at 09:28:39PM +0200, Marek Vasut wrote:
>> Is the F2SDRAM port enabled in your case ?
> Is there a way I can check this via software? Unfortunately I do not
> have access to Quartus/Qsys files, nor the person who did the design.

Looking to the U-Boot driver "drivers/net/altera_tse.c" tells me, that
it maps system memory for the SGDMA controller in its probe function. I found
the Altera SoC Triple Speed Ethernet Design Example at [1]. And yes, it seems
to use F2SDRAM as well.



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