PPC440EPx Evaluation Board Schematic

[Nicholas Williams]

I am wondering if anyone has a copy of the PPC440EPx evaluation board
(Sequoia) schematic that was made by AMCC. The information is no longer
easily available as the amcc.com and apm.com sites are no longer running
and the schematic is not archived on the wayback machine. I figured that
U-Boot might be a place to ask for this schematic but if this is not an
appropriate topic I apologize.

I am currently tasked with testing a PPC440EPx-NUA667T for a customer. One
part of the testing will require me to boot the processor up to confirm it
functions. I cannot use an evaluation board to do this testing because each
processor I am testing cannot be soldered onto a board. The testing is
being done with a socket on a test fixture which is interfaced with a high
speed digital testing system. Due to this setup I have to input individual
test vectors to the processor which is much at a lower level then the type
of code that I have found on places like U-Boot. I am having trouble
writing instructions to the device once it comes out of reset so I wanted
to see the evaluation board schematic to understand how the PPC440EPx was
interfaced to its boot rom. I can successfully get the device to come out
of Reset (de-assert ExtReset) and the EBC is putting out addresses to the
PerAddr pins (27-31) as I have configured the bootstrap pins to use
condition C from the PP440EPx User Manual (EBC boot with a 16 bit boot
width). However I have not had any luck putting in instructions during this
phase. I believe I am incorrectly putting instructions into the PerData
pins as the device does not respond to any commands.

If anyone can help I can provide screenshots of the waveforms I get from
the device else the PPC440EPx evaluation board schematic might shed more
light on how to properly communicate with the EBC.

Thank you
Nicholas

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