[PATCH] crypto/fsl: fix unaligned access

[Michael Walle]

On aarch64 running with dcache off, will result in an unaligned access
exception:

   => dcache off
   => hash sha1 $kernel_addr_r 100
   "Synchronous Abort" handler, esr 0x96000061
   elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
   elr: 00000000fbd787d8 lr : 00000000fbd786a4
   [..]

The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.

Signed-off-by: Michael Walle <michael at walle.cc>
---
 drivers/crypto/fsl/desc_constr.h | 27 +++++++++++++--------------
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h
index cb112283ac..b82ba83e73 100644
--- a/drivers/crypto/fsl/desc_constr.h
+++ b/drivers/crypto/fsl/desc_constr.h
@@ -36,19 +36,16 @@
 			       (LDOFF_ENABLE_AUTO_NFIFO << LDST_OFFSET_SHIFT))
 
 #ifdef CONFIG_PHYS_64BIT
-union ptr_addr_t {
-	u64 m_whole;
-	struct {
+struct ptr_addr_t {
 #ifdef CONFIG_SYS_FSL_SEC_LE
-		u32 low;
-		u32 high;
+	u32 low;
+	u32 high;
 #elif defined(CONFIG_SYS_FSL_SEC_BE)
-		u32 high;
-		u32 low;
+	u32 high;
+	u32 low;
 #else
 #error Neither CONFIG_SYS_FSL_SEC_LE nor CONFIG_SYS_FSL_SEC_BE is defined
 #endif
-	} m_halfs;
 };
 #endif
 
@@ -57,9 +54,10 @@ static inline void pdb_add_ptr(dma_addr_t *offset, dma_addr_t ptr)
 #ifdef CONFIG_PHYS_64BIT
 	/* The Position of low and high part of 64 bit address
 	 * will depend on the endianness of CAAM Block */
-	union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
-	ptr_addr->m_halfs.high = (u32)(ptr >> 32);
-	ptr_addr->m_halfs.low = (u32)ptr;
+	struct ptr_addr_t *ptr_addr = (struct ptr_addr_t *)offset;
+
+	ptr_addr->high = (u32)(ptr >> 32);
+	ptr_addr->low = (u32)ptr;
 #else
 	*offset = ptr;
 #endif
@@ -111,9 +109,10 @@ static inline void append_ptr(u32 *desc, dma_addr_t ptr)
 #ifdef CONFIG_PHYS_64BIT
 	/* The Position of low and high part of 64 bit address
 	 * will depend on the endianness of CAAM Block */
-	union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
-	ptr_addr->m_halfs.high = (u32)(ptr >> 32);
-	ptr_addr->m_halfs.low = (u32)ptr;
+	struct ptr_addr_t *ptr_addr = (struct ptr_addr_t *)offset;
+
+	ptr_addr->high = (u32)(ptr >> 32);
+	ptr_addr->low = (u32)ptr;
 #else
 	*offset = ptr;
 #endif
-- 
2.20.1