[PATCHv2 13/13] configs: P2020RDB: Enable DM_ETH config

Zhiqiang Hou Zhiqiang.Hou at nxp.com
Fri Jun 5 10:55:17 CEST 2020 

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Enable the DM_ETH and DM_MDIO config.

On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
V2:
 - Rebase the patch, no change intended.

 configs/P2020RDB-PC_36BIT_NAND_defconfig     | 3 +++
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 3 +++
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
 configs/P2020RDB-PC_36BIT_defconfig          | 3 +++
 configs/P2020RDB-PC_NAND_defconfig           | 3 +++
 configs/P2020RDB-PC_SDCARD_defconfig         | 3 +++
 configs/P2020RDB-PC_SPIFLASH_defconfig       | 3 +++
 configs/P2020RDB-PC_defconfig                | 3 +++
 8 files changed, 24 insertions(+)

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 950fabef21..9cacade529 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index e9b21d2d7b..2714d30464 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 6de28bd0c5..2c7ec8435f 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index c48e993b71..05171218b3 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 8d7a7891fb..2905078abf 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 280b190be4..daf9a92936 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index e0ebe44cac..ebb3934ca7 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -73,8 +74,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index dd5c14e4cb..63fd9f1c8f 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -49,6 +49,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -60,8 +61,10 @@ CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
-- 
2.25.1

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