[PATCHv2 3/3] net: tsec: Access TBI PHY through the corresponding MII

Priyanka Jain (OSS) priyanka.jain at oss.nxp.com
Mon Jun 8 09:38:48 CEST 2020


>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Zhiqiang Hou
>Sent: Sunday, May 3, 2020 8:19 PM
>To: u-boot at lists.denx.de; joe.hershberger at ni.com; bmeng.cn at gmail.com;
>olteanv at gmail.com; Priyanka Jain <priyanka.jain at nxp.com>
>Cc: Z.q. Hou <zhiqiang.hou at nxp.com>
>Subject: [PATCHv2 3/3] net: tsec: Access TBI PHY through the corresponding
>M
II
>
>From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
>
>When an eTSEC is configured to use TBI, configuration of the TBI is done
>through the MIIM registers for that eTSEC.
>For example, if a TBI interface is required on eTSEC2, then the MIIM registers
>starting at offset 0x2_5520 are used to configure it.
>
>Fixes: 9a1d6af55ecd ("net: tsec: Add driver model ethernet support")
>Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
>Reviewed-by: Vladimir Oltean <vladimir.oltean at nxp.com>
>Tested-by: Vladimir Oltean <vladimir.oltean at nxp.com>
>---
<snip>
Series applied on mpc85xx. Awaiting upstream

Thanks
Priyanka


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