[PATCH] arm: socfpga: gen5: Enable cache driver in SPL

Tan, Ley Foon ley.foon.tan at intel.com
Tue Jun 9 11:52:03 CEST 2020



> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: Friday, June 5, 2020 8:53 PM
> To: Tan, Ley Foon <ley.foon.tan at intel.com>; u-boot at lists.denx.de
> Cc: Ley Foon Tan <lftan.linux at gmail.com>; See, Chin Liang
> <chin.liang.see at intel.com>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Ang, Chee Hong
> <chee.hong.ang at intel.com>
> Subject: Re: [PATCH] arm: socfpga: gen5: Enable cache driver in SPL
> 
> On 6/5/20 10:20 AM, Ley Foon Tan wrote:
> > Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable
> > cache driver in SPL.
> >
> > This fixed error below in SPL:
> > cache controller driver NOT found!
> >
> > Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
> 
> Is this for current release or next ?
Can drop this patch first. Just found out only see this error when enable ECC scrubbing with Dcache in Gen5 in our downstream branch. But, mainline Uboot haven't support ECC in Gen5 yet. Will add this patch when enable ECC in Gen5 later.

Thanks.

Regards
Ley Foon 


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