[PATCH v3 20/35] acpi: Support writing a GPIO
Simon Glass
sjg at chromium.org
Sun Jun 14 04:55:08 CEST 2020
Allowing writing out a reference to a GPIO within the ACPI output. This
can be used by ACPI code to access a GPIO at runtime.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v3:
- Use an enum for the GPIO priority
- Add error checking
include/acpi/acpi_dp.h | 20 ++++++++++++++++++++
lib/acpi/acpi_dp.c | 23 +++++++++++++++++++++++
test/dm/acpi_dp.c | 40 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 83 insertions(+)
diff --git a/include/acpi/acpi_dp.h b/include/acpi/acpi_dp.h
index 3fd048e111..efbec3d152 100644
--- a/include/acpi/acpi_dp.h
+++ b/include/acpi/acpi_dp.h
@@ -11,6 +11,8 @@
struct acpi_ctx;
+#include <acpi/acpi_device.h>
+
/*
* Writing Device Properties objects via _DSD
*
@@ -203,6 +205,24 @@ struct acpi_dp *acpi_dp_add_integer_array(struct acpi_dp *dp, const char *name,
struct acpi_dp *acpi_dp_add_child(struct acpi_dp *dp, const char *name,
struct acpi_dp *child);
+/**
+ * acpi_dp_add_gpio() - Add a GPIO to a list of Device Properties
+ *
+ * A new node is added to the end of the property list of @dp, with the
+ * GPIO properties added to the the new node
+ *
+ * @dp: Table to add this property to
+ * @name: Name of property
+ * @ref: Reference to device with a _CRS containing GpioIO or GpioInt
+ * @index: Index of the GPIO resource in _CRS starting from zero
+ * @pin: Pin in the GPIO resource, typically zero
+ * @polarity: GPIO polarity. Note that ACPI_IRQ_ACTIVE_BOTH is not supported
+ * @return pointer to new node, or NULL if out of memory
+ */
+struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name,
+ const char *ref, int index, int pin,
+ enum acpi_irq_polarity polarity);
+
/**
* acpi_dp_write() - Write Device Property hierarchy and clean up resources
*
diff --git a/lib/acpi/acpi_dp.c b/lib/acpi/acpi_dp.c
index ebbc5d5538..4ff857a451 100644
--- a/lib/acpi/acpi_dp.c
+++ b/lib/acpi/acpi_dp.c
@@ -321,3 +321,26 @@ struct acpi_dp *acpi_dp_add_integer_array(struct acpi_dp *dp, const char *name,
return dp_array;
}
+
+struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name,
+ const char *ref, int index, int pin,
+ enum acpi_irq_polarity polarity)
+{
+ struct acpi_dp *gpio;
+
+ assert(dp);
+ gpio = acpi_dp_new_table(name);
+ if (!gpio)
+ return NULL;
+
+ if (!acpi_dp_add_reference(gpio, NULL, ref) ||
+ !acpi_dp_add_integer(gpio, NULL, index) ||
+ !acpi_dp_add_integer(gpio, NULL, pin) ||
+ !acpi_dp_add_integer(gpio, NULL, polarity == ACPI_IRQ_ACTIVE_LOW))
+ return NULL;
+
+ if (!acpi_dp_add_array(dp, gpio))
+ return NULL;
+
+ return gpio;
+}
diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c
index c11394786f..24615c384f 100644
--- a/test/dm/acpi_dp.c
+++ b/test/dm/acpi_dp.c
@@ -403,3 +403,43 @@ static int dm_test_acpi_dp_child(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_acpi_dp_child, 0);
+
+/* Test emitting a GPIO */
+static int dm_test_acpi_dp_gpio(struct unit_test_state *uts)
+{
+ struct acpi_ctx *ctx;
+ struct acpi_dp *dp;
+ u8 *ptr, *pptr;
+
+ ut_assertok(alloc_context(&ctx));
+
+ dp = acpi_dp_new_table("FRED");
+ ut_assertnonnull(dp);
+
+ /* Try a few different parameters */
+ ut_assertnonnull(acpi_dp_add_gpio(dp, "reset", TEST_REF, 0x23, 0x24,
+ ACPI_IRQ_ACTIVE_HIGH));
+ ut_assertnonnull(acpi_dp_add_gpio(dp, "allow", TEST_REF, 0, 0,
+ ACPI_IRQ_ACTIVE_LOW));
+
+ ptr = acpigen_get_current(ctx);
+ ut_assertok(acpi_dp_write(ctx, dp));
+ ut_asserteq(0x6e, acpigen_get_current(ctx) - ptr);
+
+ pptr = ptr + 0x2c; //0x3a;
+ ut_asserteq_str("reset", (char *)pptr);
+ ut_asserteq_strn(EXPECT_REF, (char *)pptr + 0xe);
+ ut_asserteq(0x23, pptr[0x1b]);
+ ut_asserteq(0x24, pptr[0x1d]);
+ ut_asserteq(ZERO_OP, pptr[0x1e]);
+
+ pptr = ptr + 0x51;
+ ut_asserteq_str("allow", (char *)pptr);
+ ut_asserteq_strn(EXPECT_REF, (char *)pptr + 0xe);
+ ut_asserteq(ZERO_OP, pptr[0x1a]);
+ ut_asserteq(ZERO_OP, pptr[0x1b]);
+ ut_asserteq(ONE_OP, pptr[0x1c]);
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_dp_gpio, 0);
--
2.27.0.290.gba653c62da-goog
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