[PATCH v2 16/25] x86: mtrr: Use MP calls to list the MTRRs
Simon Glass
sjg at chromium.org
Sun Jun 14 18:59:49 CEST 2020
Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.
Signed-off-by: Simon Glass <sjg at chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner at br-automation.com>
---
Changes in v2:
- Rename mtrr_save_all() to mtrr_read_all()
arch/x86/cpu/mtrr.c | 11 +++++++++++
arch/x86/include/asm/mtrr.h | 30 ++++++++++++++++++++++++++++++
cmd/x86/mtrr.c | 25 +++++++++++++++++++++----
3 files changed, 62 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index 7ec0733337..c9b4e7d06e 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -21,6 +21,7 @@
#include <log.h>
#include <asm/cache.h>
#include <asm/io.h>
+#include <asm/mp.h>
#include <asm/msr.h>
#include <asm/mtrr.h>
@@ -63,6 +64,16 @@ static void set_var_mtrr(uint reg, uint type, uint64_t start, uint64_t size)
wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask | MTRR_PHYS_MASK_VALID);
}
+void mtrr_read_all(struct mtrr_info *info)
+{
+ int i;
+
+ for (i = 0; i < MTRR_COUNT; i++) {
+ info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
+ info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
+ }
+}
+
int mtrr_commit(bool do_caches)
{
struct mtrr_request *req = gd->arch.mtrr_req;
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 212a699c1b..e1f1a44643 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -70,6 +70,26 @@ struct mtrr_state {
bool enable_cache;
};
+/**
+ * struct mtrr - Information about a single MTRR
+ *
+ * @base: Base address and MTRR_BASE_TYPE_MASK
+ * @mask: Mask and MTRR_PHYS_MASK_VALID
+ */
+struct mtrr {
+ u64 base;
+ u64 mask;
+};
+
+/**
+ * struct mtrr_info - Information about all MTRRs
+ *
+ * @mtrr: Information about each mtrr
+ */
+struct mtrr_info {
+ struct mtrr mtrr[MTRR_COUNT];
+};
+
/**
* mtrr_open() - Prepare to adjust MTRRs
*
@@ -129,6 +149,16 @@ int mtrr_commit(bool do_caches);
*/
int mtrr_set_next_var(uint type, uint64_t base, uint64_t size);
+/**
+ * mtrr_read_all() - Save all the MTRRs
+ *
+ * This reads all MTRRs from the boot CPU into a struct so they can be loaded
+ * onto other CPUs
+ *
+ * @info: Place to put the MTRR info
+ */
+void mtrr_read_all(struct mtrr_info *info);
+
#endif
#if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0)
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 5d25c5802a..f357f58767 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -5,7 +5,9 @@
#include <common.h>
#include <command.h>
+#include <log.h>
#include <asm/msr.h>
+#include <asm/mp.h>
#include <asm/mtrr.h>
static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
@@ -18,19 +20,32 @@ static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
"Back",
};
-static int do_mtrr_list(void)
+static void read_mtrrs(void *arg)
{
+ struct mtrr_info *info = arg;
+
+ mtrr_read_all(info);
+}
+
+static int do_mtrr_list(int cpu_select)
+{
+ struct mtrr_info info;
+ int ret;
int i;
printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||",
"Mask ||", "Size ||");
+ memset(&info, '\0', sizeof(info));
+ ret = mp_run_on_cpus(cpu_select, read_mtrrs, &info);
+ if (ret)
+ return log_msg_ret("run", ret);
for (i = 0; i < MTRR_COUNT; i++) {
const char *type = "Invalid";
uint64_t base, mask, size;
bool valid;
- base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
- mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
+ base = info.mtrr[i].base;
+ mask = info.mtrr[i].mask;
size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
size |= (1 << 12) - 1;
size += 1;
@@ -102,11 +117,13 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
const char *cmd;
+ int cpu_select;
uint reg;
+ cpu_select = MP_SELECT_BSP;
cmd = argv[1];
if (argc < 2 || *cmd == 'l')
- return do_mtrr_list();
+ return do_mtrr_list(cpu_select);
argc -= 2;
argv += 2;
if (argc <= 0)
--
2.27.0.290.gba653c62da-goog
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