[U-boot,1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

[Mark-MC.Lee]

On Sun, 2020-05-31 at 08:08 -0600, Simon Glass wrote:
> Hi MarkLee,
> 
> On Wed, 27 May 2020 at 05:25, MarkLee <Mark-MC.Lee at mediatek.com> wrote:
> >
> > The sgmii mode init flow is almost the same for all mediatek SoC, the
> > only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
> > for old chip(mt7622) but changed to 0x128 for newer chip(mt7629 and
> > the following chips).
> >
> > Signed-off-by: MarkLee <Mark-MC.Lee at mediatek.com>
> > ---
> >  drivers/net/mtk_eth.h | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
> > index f2940c9996..3c85eab91a 100644
> > --- a/drivers/net/mtk_eth.h
> > +++ b/drivers/net/mtk_eth.h
> > @@ -44,7 +44,12 @@
> >  #define SGMSYS_QPHY_PWR_STATE_CTRL     0xe8
> >  #define SGMII_PHYA_PWD                 BIT(4)
> >
> > +#if defined(CONFIG_TARGET_MT7622)
> >  #define SGMSYS_GEN2_SPEED              0x2028
> > +#else
> > +#define SGMSYS_GEN2_SPEED              0x128
> > +#endif
> 
> You can't check #ifdefs in drivers. You should use a compatible
> string, then device_get_driver_data() to decide what the value is
> here.
Thanks for your review and suggestion, will change to use private data
from dts to decide the value in the following V2 patch.
> 
> Or if this is board-specific you could add it to the device-tree node
> as a property, if it is in the binding.
> 
> Regards,
> Simon