[PATCH V2 3/5] clk: renesas: Add R8A774A1 clock tables

[Marek Vasut]

On 6/21/20 3:37 PM, Adam Ford wrote:
[...]
> static const struct mstp_stop_table r8a774a1_mstp_table[] = {
> { 0x00000000, 0, 0x00000000, 0 },
> { 0xc3e81000, 0, 0xc3e81000, 0 },
> { 0x000E0FDC, 0, 0x000E0FDC, 0 },
> { 0xD00C7C1F, 0, 0xD00C7C1F, 0 },
> { 0x80000004, 0, 0x80000004, 0 },
> { 0x00DF0006, 0, 0x00DF0006, 0 },
> { 0XC5EACCCE, 0, 0XC5EACCCE, 0 },
> { 0x29E1401C, 0, 0x29E1401C, 0 },
> { 0x00009FF1, 0, 0x00009FF1, 0 },
> { 0xFC4FDFE0, 0, 0xFC4FDFE0, 0 },
> { 0xFFFEFFE8, 0, 0xFFFEFFE8, 0 },
> };
> 
> I read through registers 1-10, but there doesn't appear to be a
> register 0, so I left it as all 0's.
> The rest of these I only set the bits based on flags that were
> available for the RZ/G2M regardless of their default clock status.
> 
> Does this look right to you?  If you think it looks good, I'll submit
> another revision.

If it matches the datasheet, then it's fine, thanks.