[PATCHv2] armv8: MMU: Mark code memory Executable, any other Non-Executable

Marek Bykowski marek.bykowski at gmail.com
Wed Jun 24 14:35:46 CEST 2020


On Fri, Jun 19, 2020 at 02:53:32PM +0200, Marek Bykowski wrote:
> From: Marek Bykowski <marek.bykowski at gmail.com>
> 
> However if we fail programming so and the instruction fetch logic goes
> mispredict to non-instruction memory it may eventually perturb it, eg.
> corrupt the FIFO, or the control registers, load the unified cache
> the data side memory system hits into subsequently.
> 
> U-Boot adheres into attributing the device regions to Execute-Never but
> it actually fails doing so for data regions. Data as well as Device Regions
> should be Execute-Never.
> 
I kind of missed to say that 'not having' this patch may result in
an fault/faults on the systems with Cortex-A57. On our system the System Memory
Controller gets violated and raises an error interrupt. The fault that
it gets received is out-of-order type, that is an attempt to read from
an out-of-range address with details below:

out_of_range_addr 0x702200200   -> faulting address
out_of_range_length 0x40        -> burst size
out_of_range_type 0x5           -> stands for a wrapped read command
out_of_range_source_id 0x0      -> source indicates it is coming from CPU0

Burst size 64 bytes (a cache line size) and the wrapped read may suggest
the data side memory system hit into the cache loaded by the mispredited
instruction fetch.

Re-programming the MMU as per-patch makes the errors disappear.

Marek



More information about the U-Boot mailing list