[PATCH] clk: versal: Remove alt_ref_clk from clock sources
Michal Simek
monstr at monstr.eu
Thu Jun 25 10:03:17 CEST 2020
út 12. 5. 2020 v 8:19 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> From: Rajan Vaja <rajan.vaja at xilinx.com>
>
> alt_ref_clk is applicable only for PS extended version.
> For PS base version there is no separate alt_ref_clk.
> It is tied with ref_clk, so remove it from driver.
>
> Signed-off-by: Rajan Vaja <rajan.vaja at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
> drivers/clk/clk_versal.c | 8 +-------
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
> index 075a08380d84..6cdd3dd90510 100644
> --- a/drivers/clk/clk_versal.c
> +++ b/drivers/clk/clk_versal.c
> @@ -114,7 +114,6 @@ struct versal_clk_priv {
> struct versal_clock *clk;
> };
>
> -static ulong alt_ref_clk;
> static ulong pl_alt_ref_clk;
> static ulong ref_clk;
>
> @@ -545,8 +544,7 @@ int soc_clk_dump(void)
>
> printf("\n ****** VERSAL CLOCKS *****\n");
>
> - printf("alt_ref_clk:%ld pl_alt_ref_clk:%ld ref_clk:%ld\n",
> - alt_ref_clk, pl_alt_ref_clk, ref_clk);
> + printf("pl_alt_ref_clk:%ld ref_clk:%ld\n", pl_alt_ref_clk, ref_clk);
> for (i = 0; i < clock_max_idx; i++) {
> debug("%s\n", clock[i].clk_name);
> ret = versal_get_clock_type(i, &type);
> @@ -664,10 +662,6 @@ static int versal_clk_probe(struct udevice *dev)
>
> debug("%s\n", __func__);
>
> - ret = versal_clock_get_freq_by_name("alt_ref_clk", dev, &alt_ref_clk);
> - if (ret < 0)
> - return -EINVAL;
> -
> ret = versal_clock_get_freq_by_name("pl_alt_ref_clk",
> dev, &pl_alt_ref_clk);
> if (ret < 0)
> --
> 2.26.2
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
More information about the U-Boot
mailing list