[PATCH] sync helios4 config to clearfog and dts to kernel
Stefan Roese
sr at denx.de
Mon Jun 29 08:41:17 CEST 2020
On 27.06.20 22:00, dgilmore at redhat.com wrote:
> From: Dennis Gilmore <dennis at ausil.us>
>
> The helios4 is built on the same microsom as the clearfog, by syncing the config
> we enable the same featureset that exists in the som on the helios4. The current
> config does not boot as some of the clearfog changes needed to be made on the
> helios4 also, generally speaking most changes for the clearfog should also be
> made on the helios4.
>
> Signed-off-by: Dennis Gilmore <dennis at ausil.us>
A small change in the patch subject would be good, like:
arm: mvebu: helios4: sync helios4 config to clearfog and dts to kernel
Other that that:
Reviewed-by: Stefan Roese <sr at denx.de>
Thanks,
Stefan
> ---
> arch/arm/dts/armada-388-helios4-u-boot.dtsi | 15 ++++
> arch/arm/dts/armada-388-helios4.dts | 16 ++--
> configs/helios4_defconfig | 20 +++--
> include/configs/helios4.h | 95 ++++++++++++---------
> 4 files changed, 93 insertions(+), 53 deletions(-)
>
> diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
> index f0da9f42de..0753889854 100644
> --- a/arch/arm/dts/armada-388-helios4-u-boot.dtsi
> +++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
> @@ -14,6 +14,9 @@
>
> &spi1 {
> u-boot,dm-spl;
> + spi-flash at 0 {
> + u-boot,dm-spl;
> + };
> };
>
> &w25q32 {
> @@ -21,6 +24,18 @@
> u-boot,dm-spl;
> };
>
> +&gpio0 {
> + u-boot,dm-spl;
> +};
> +
> +&ahci0 {
> + u-boot,dm-spl;
> +};
> +
> +&ahci1 {
> + u-boot,dm-spl;
> +};
> +
> &sdhci {
> u-boot,dm-spl;
> };
> diff --git a/arch/arm/dts/armada-388-helios4.dts b/arch/arm/dts/armada-388-helios4.dts
> index a154e0f4f4..fb49df2a3b 100644
> --- a/arch/arm/dts/armada-388-helios4.dts
> +++ b/arch/arm/dts/armada-388-helios4.dts
> @@ -140,11 +140,6 @@
> soc {
> internal-regs {
> i2c at 11000 {
> - clock-frequency = <400000>;
> - pinctrl-0 = <&i2c0_pins>;
> - pinctrl-names = "default";
> - status = "okay";
> -
> /*
> * PCA9655 GPIO expander, up to 1MHz clock.
> * 0-Board Revision bit 0 #
> @@ -187,8 +182,7 @@
> gpio-hog;
> gpios = <5 GPIO_ACTIVE_HIGH>;
> input;
> - line-name =
> - "usb-overcurrent-status";
> + line-name = "usb-overcurrent-status";
> };
> };
>
> @@ -248,7 +242,7 @@
> bus-width = <4>;
> cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
> no-1-8-v;
> - pinctrl-0 = <µsom_sdhci_pins
> + pinctrl-0 = <&helios_sdhci_pins
> &helios_sdhci_cd_pins>;
> pinctrl-names = "default";
> status = "okay";
> @@ -286,6 +280,12 @@
> marvell,pins = "mpp20";
> marvell,function = "gpio";
> };
> + helios_sdhci_pins: helios-sdhci-pins {
> + marvell,pins = "mpp21", "mpp28",
> + "mpp37", "mpp38",
> + "mpp39", "mpp40";
> + marvell,function = "sd0";
> + };
> helios_led_pins: helios-led-pins {
> marvell,pins = "mpp24", "mpp25",
> "mpp49", "mpp50",
> diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
> index e15f10cdd5..9cc87fd96a 100644
> --- a/configs/helios4_defconfig
> +++ b/configs/helios4_defconfig
> @@ -1,5 +1,6 @@
> CONFIG_ARM=y
> CONFIG_ARCH_CPU_INIT=y
> +CONFIG_SYS_THUMB_BUILD=y
> CONFIG_ARCH_MVEBU=y
> CONFIG_SYS_TEXT_BASE=0x00800000
> CONFIG_SPL_LIBCOMMON_SUPPORT=y
> @@ -24,40 +25,47 @@ CONFIG_USE_PREBOOT=y
> CONFIG_SYS_CONSOLE_INFO_QUIET=y
> # CONFIG_DISPLAY_BOARDINFO is not set
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> -CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
> +CONFIG_SPL_I2C_SUPPORT=y
> +CONFIG_CMD_TLV_EEPROM=y
> +CONFIG_SPL_CMD_TLV_EEPROM=y
> # CONFIG_CMD_FLASH is not set
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> # CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_TFTPPUT=y
> CONFIG_CMD_CACHE=y
> CONFIG_CMD_TIME=y
> +CONFIG_CMD_MVEBU_BUBT=y
> # CONFIG_SPL_PARTITION_UUIDS is not set
> CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4"
> CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_SPL_OF_TRANSLATE=y
> -CONFIG_SCSI_AHCI=y
> +CONFIG_AHCI_MVEBU=y
> CONFIG_DM_PCA953X=y
> CONFIG_DM_I2C=y
> -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
> -CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1
> CONFIG_SYS_I2C_MVTWSI=y
> +CONFIG_I2C_EEPROM=y
> +CONFIG_SPL_I2C_EEPROM=y
> CONFIG_DM_MMC=y
> +CONFIG_SUPPORT_EMMC_BOOT=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_SDMA=y
> CONFIG_MMC_SDHCI_MV=y
> CONFIG_MTD=y
> CONFIG_SF_DEFAULT_BUS=1
> -CONFIG_SF_DEFAULT_SPEED=104000000
> CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_MTD=y
> CONFIG_PHY_MARVELL=y
> CONFIG_PHY_GIGE=y
> CONFIG_MVNETA=y
> CONFIG_MII=y
> +CONFIG_PCI=y
> +CONFIG_PCI_MVEBU=y
> CONFIG_SCSI=y
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550=y
> diff --git a/include/configs/helios4.h b/include/configs/helios4.h
> index 31e2e78b62..2f4b67025c 100644
> --- a/include/configs/helios4.h
> +++ b/include/configs/helios4.h
> @@ -6,7 +6,6 @@
> #ifndef _CONFIG_HELIOS4_H
> #define _CONFIG_HELIOS4_H
>
> -#include <linux/sizes.h>
> #include <linux/stringify.h>
>
> /*
> @@ -30,26 +29,30 @@
>
> #define CONFIG_ENV_MIN_ENTRIES 128
>
> +/* Environment in MMC */
> +#define CONFIG_SYS_MMC_ENV_DEV 0
> /*
> - * SATA/SCSI/AHCI configuration
> + * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
> + * boot image starts @ LBA-0.
> + * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
> + * image and environment
> */
> -#define CONFIG_SCSI_AHCI_PLAT
> -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
> -#define CONFIG_SYS_SCSI_MAX_LUN 2
> -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
> - CONFIG_SYS_SCSI_MAX_LUN)
>
> -#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
> -/* Environment in SPI NOR flash */
> -#endif
> +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
>
> -#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
> -/* Environment in MMC */
> -#define CONFIG_SYS_MMC_ENV_DEV 0
> -/* stay within first 1M */
> +/* PCIe support */
> +#ifndef CONFIG_SPL_BUILD
> +#define CONFIG_PCI_SCAN_SHOW
> #endif
>
> -#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
> +/* SATA support */
> +#ifdef CONFIG_SCSI
> +#define CONFIG_SCSI_AHCI_PLAT
> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
> +#define CONFIG_SYS_SCSI_MAX_LUN 1
> +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
> + CONFIG_SYS_SCSI_MAX_LUN)
> +#endif
>
> /* Keep device tree and initrd in lower memory so the kernel can access them */
> #define RELOCATION_LIMITS_ENV_SETTINGS \
> @@ -57,22 +60,6 @@
> "initrd_high=0x10000000\0"
>
> /* SPL */
> -/*
> - * Select the boot device here
> - *
> - * Currently supported are:
> - * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
> - * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
> - */
> -#define SPL_BOOT_SPI_NOR_FLASH 1
> -#define SPL_BOOT_SDIO_MMC_CARD 2
> -
> -#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
> -#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
> -#endif
> -#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
> -#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
> -#endif
>
> /* Defines for SPL */
> #define CONFIG_SPL_SIZE (140 << 10)
> @@ -88,11 +75,10 @@
> #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>
> -#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
> +#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
> +/* SPL related SPI defines */
> #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
> -#endif
> -
> -#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
> +#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
> /* SPL related MMC defines */
> #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
> #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
> @@ -100,6 +86,7 @@
> #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
> #endif
> #endif
> +
> /*
> * mv-common.h should be defined after CMD configs since it used them
> * to enable certain macros
> @@ -121,16 +108,46 @@
> #define BOOT_TARGET_DEVICES_USB(func)
> #endif
>
> -#ifdef CONFIG_SATA
> -#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0)
> +#ifndef CONFIG_SCSI
> +#define BOOT_TARGET_DEVICES_SCSI_BUS0(func)
> +#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
> +#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
> +#else
> +/*
> + * With SCSI enabled, M.2 SATA is always located on bus 0
> + */
> +#define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0)
> +
> +/*
> + * Either one or both mPCIe slots may be configured as mSATA interfaces. The
> + * SCSI bus ids are assigned based on sequence of hardware present, not always
> + * tied to hardware slot ids. As such, use second SCSI bus if either slot is
> + * set for SATA, and only use third SCSI bus if both slots are SATA enabled.
> + */
> +#if defined (CONFIG_HELIOS4_CON2_SATA) || defined (CONFIG_HELIOS4_CON3_SATA)
> +#define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1)
> +#else
> +#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
> +#endif
> +
> +#if defined (CONFIG_HELIOS4_CON2_SATA) && defined (CONFIG_HELIOS4_CON3_SATA)
> +#define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2)
> #else
> -#define BOOT_TARGET_DEVICES_SATA(func)
> +#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
> #endif
>
> +#endif /* CONFIG_SCSI */
> +
> +/*
> + * The SCSI buses are attempted in increasing bus order, there is no current
> + * mechanism to alter the default bus priority order for booting.
> + */
> #define BOOT_TARGET_DEVICES(func) \
> BOOT_TARGET_DEVICES_MMC(func) \
> BOOT_TARGET_DEVICES_USB(func) \
> - BOOT_TARGET_DEVICES_SATA(func) \
> + BOOT_TARGET_DEVICES_SCSI_BUS0(func) \
> + BOOT_TARGET_DEVICES_SCSI_BUS1(func) \
> + BOOT_TARGET_DEVICES_SCSI_BUS2(func) \
> func(PXE, pxe, na) \
> func(DHCP, dhcp, na)
>
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de
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