[PATCH 1/7] Revert "riscv: Clear pending interrupts before enabling IPIs"
Rick Chen
rickchen36 at gmail.com
Wed Sep 9 09:50:40 CEST 2020
Hi Sean
> Clearing MIP doesn't do anything. Whoops. The following commits should
> tackle this problem in a more robust manner.
I still not catch your points about that this commit 947263033 really
help to fix pending IPIs not clean problem on k210 platform at that
time, but you just said it do nothing and remove it here currently.
Thanks,
Rick
>
> This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6.
>
> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> ---
>
> arch/riscv/cpu/start.S | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index bf9fdf369b..e3222b1ea7 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -65,8 +65,6 @@ _start:
> #else
> li t0, SIE_SSIE
> #endif
> - /* Clear any pending IPIs */
> - csrc MODE_PREFIX(ip), t0
> csrs MODE_PREFIX(ie), t0
> #endif
>
> --
> 2.28.0
>
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