[PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support

Pratyush Yadav p.yadav at ti.com
Mon Apr 5 09:43:29 CEST 2021


On 02/04/21 06:28PM, Sean Anderson wrote:
> On 4/1/21 3:31 PM, Pratyush Yadav wrote:
> > Hi,
> > 
> > This series adds support for octal DTR flashes in the SPI NOR framework,
> 
> As an overall question, is this the same as "DDR" mode?

Sort of...

DDR is "Double Data Rate" which implies that the "double" part only 
refers to the data phase. DTR is "Double Transfer Rate" which means the 
"double" part refers to all 3 (command, address, data) phases.

The underlying concept is the same: transfer data twice per clock cycle.

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.


More information about the U-Boot mailing list