[PATCH 03/17] arm: mach-k3: am642: Unlock all applicable control MMR registers

Dave Gerlach d-gerlach at ti.com
Fri Apr 23 18:27:34 CEST 2021


To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.

Signed-off-by: Dave Gerlach <d-gerlach at ti.com>
---
 arch/arm/mach-k3/am642_init.c                 | 16 ++++++++++++++++
 arch/arm/mach-k3/include/mach/am64_hardware.h | 10 ++++++----
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index e63275ccc68f..5ab2904c5e0c 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -15,12 +15,28 @@
 
 #if defined(CONFIG_SPL_BUILD)
 
+static void ctrl_mmr_unlock(void)
+{
+	/* Unlock all PADCFG_MMR1 module registers */
+	mmr_unlock(PADCFG_MMR1_BASE, 1);
+
+	/* Unlock all CTRL_MMR0 module registers */
+	mmr_unlock(CTRL_MMR0_BASE, 0);
+	mmr_unlock(CTRL_MMR0_BASE, 1);
+	mmr_unlock(CTRL_MMR0_BASE, 2);
+	mmr_unlock(CTRL_MMR0_BASE, 3);
+	mmr_unlock(CTRL_MMR0_BASE, 5);
+	mmr_unlock(CTRL_MMR0_BASE, 6);
+}
+
 void board_init_f(ulong dummy)
 {
 #if defined(CONFIG_CPU_V7R)
 	setup_k3_mpu_regions();
 #endif
 
+	ctrl_mmr_unlock();
+
 	/* Init DM early */
 	spl_early_init();
 
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 8136585bde6f..ec5387025b98 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -12,6 +12,8 @@
 #define CTRL_MMR0_BASE					0x43000000
 #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)
 
+#define PADCFG_MMR1_BASE				0xf0000
+
 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK		0x00000078
 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT		3
 
@@ -29,14 +31,14 @@
 #define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK		0x04
 
 /*
- * The CTRL_MMR memory space is divided into several equally-spaced
- * partitions, so defining the partition size allows us to determine
- * register addresses common to those partitions.
+ * The CTRL_MMR and PADCFG_MMR memory space is divided into several
+ * equally-spaced partitions, so defining the partition size allows us to
+ * determine register addresses common to those partitions.
  */
 #define CTRL_MMR0_PARTITION_SIZE			0x4000
 
 /*
- * CTRL_MMR lock/kick-mechanism shared register definitions.
+ * CTRL_MMR and PADCFG_MMR lock/kick-mechanism shared register definitions.
  */
 #define CTRLMMR_LOCK_KICK0				0x01008
 #define CTRLMMR_LOCK_KICK0_UNLOCK_VAL			0x68ef3490
-- 
2.28.0



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